From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5ED1615ACE; Tue, 2 Jan 2024 18:54:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KC1iyssy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A9FB8C433C7; Tue, 2 Jan 2024 18:54:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1704221681; bh=xX4Lln/6UdI6zrqWnFMmp4/+v7+YVcoSF10ZkFApq7k=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=KC1iyssykDPzsGGG8MaQUfQHFqPp9xFvFt+UGJ3NoER5V7DLBYHHKxQE5/NTsvEtp lAcAe9lD/iqfAocAh/G1TQrqI37A5b7whMAF9n16lm1A70c1gsXLhmN5dsE4QQl0xR knYlcbH36heVUUc+OCtO+a9ycpfGU4DH44zi+oxqZlFQ2ECWjMA0zydn5+dAYbAp0E VaBucANI9tpayWfHX6peiWGA8IKD77Cuxrmlv+kEfsfJ4Lt4pBNpCQMZOClBv+Lvny sYb56s7uBk9Ss0gCpfBzXtDAwkdrxiNQn2+rpnwhO4McBCLAUM9G6XGKk29XfyILlx CMik/wcA9IcRg== Received: (nullmailer pid 3374826 invoked by uid 1000); Tue, 02 Jan 2024 18:54:39 -0000 Date: Tue, 2 Jan 2024 11:54:39 -0700 From: Rob Herring To: Alex Bee Cc: linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Heiko =?iso-8859-1?Q?St=FCbner?= , Daniel Vetter , Thomas Zimmermann , Conor Dooley , dri-devel@lists.freedesktop.org, David Airlie , Maarten Lankhorst , Sandy Huang , devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, Rob Herring , Conor Dooley , Maxime Ripard , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4 01/29] dt-bindings: display: rockchip,inno-hdmi: Document RK3128 compatible Message-ID: <170422164796.3374067.13785716763431704594.robh@kernel.org> References: <20231222174220.55249-1-knaerzche@gmail.com> <20231222174220.55249-2-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231222174220.55249-2-knaerzche@gmail.com> On Fri, 22 Dec 2023 18:41:52 +0100, Alex Bee wrote: > The integration for this SoC is different from the currently existing: It > needs it's PHY's reference clock rate to calculate the DDC bus frequency > correctly. The controller is also part of a powerdomain, so this gets added > as an mandatory property for this variant. > > Signed-off-by: Alex Bee > Reviewed-by: Conor Dooley > --- > changes in v2: > - clarify that the controller itself is part of the powerdomain > - simplify clock-names > - made power-domains property only allowed (and required) for new variant > > changes in v3: > - collect RB > > changes in v4: > - none > > .../display/rockchip/rockchip,inno-hdmi.yaml | 40 ++++++++++++++++++- > 1 file changed, 38 insertions(+), 2 deletions(-) > Since I applied the conversion I applied this one, thanks!