From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from uho.ysoft.cz (uho.ysoft.cz [81.19.3.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B351679D2; Wed, 14 Feb 2024 09:04:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=81.19.3.130 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707901473; cv=none; b=tMf5lBoLNUC8l/MIcxkqHrtGFnrQ9IahtvPQHUXo5uGvRzwz2AO+ZmZLIk4GbcYBI0FYAWpbMIFumgaqa0w1n7BL5bOTyLMAQK4HeBX0eIn4EiC2e33mXqRPPTBSVLOw8sxxjl00QXrlGeGYx2J9VQnGXtaMm2DTmRT9L+g8Whg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707901473; c=relaxed/simple; bh=NabSFMAj7QEe5/xa7bW5tvQsHBXSCoMhb1gIoOGlJ8w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=kAv9f+B7HLy3eMfs4hLXSz/WmSj8gB49OMM5t73LoDB4hdy7margtWOSalORdR2Goju29NOFDPqtPfc88R6KHR0R8AOMhnJr3g+wCc5Tj+fA4ieZBEHT4rpsfsIFeHd2OxcNkeDfDC8mQGsPlPGFbVPPaDxUJXtpfUwVQsTwCxs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ysoft.com; spf=pass smtp.mailfrom=ysoft.com; dkim=pass (1024-bit key) header.d=ysoft.com header.i=@ysoft.com header.b=L7PteXqc; arc=none smtp.client-ip=81.19.3.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ysoft.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ysoft.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ysoft.com header.i=@ysoft.com header.b="L7PteXqc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ysoft.com; s=20160406-ysoft-com; t=1707901463; bh=De7gtKQUI6kPNqgDef3IVCXJrTn70XyIKQzykcjjq/E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=L7PteXqcQIxxQVD0d9+WyBdF7XK0uUHG7ot4YTRj0L1DTzu6M8zK8NQFogNsVsrX7 9sfuhUaGjSyRsBy2B/IuzKh2IfHWyQibTUo8RTGBqZANgw7xCcS/7JoUo1rmB9jtjX UURSFCo5hYzbKYk6GMwA3frj5zr5JVmry8dm3MnM= Received: from iota-build.ysoft.local (unknown [10.1.5.151]) by uho.ysoft.cz (Postfix) with ESMTP id 6D6E3A0336; Wed, 14 Feb 2024 10:04:23 +0100 (CET) From: =?UTF-8?q?Michal=20Vok=C3=A1=C4=8D?= To: Shawn Guo , Fabio Estevam , Andrew Lunn Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonathan McDowell , =?UTF-8?q?Michal=20Vok=C3=A1=C4=8D?= Subject: [PATCH v2 2/2] ARM: dts: imx6dl-yapp4: Move the internal switch PHYs under the switch node Date: Wed, 14 Feb 2024 10:03:28 +0100 Message-Id: <1707901408-17084-2-git-send-email-michal.vokac@ysoft.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1707901408-17084-1-git-send-email-michal.vokac@ysoft.com> References: <1707901408-17084-1-git-send-email-michal.vokac@ysoft.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We identified that the PHYs actually do not work since commit 7da7b84fee58 ("ARM: dts: imx6dl-yapp4: Move phy reset into switch node") as a coincidence of several circumstances. The reset signal is kept asserted by a pull-down resistor on the board unless it is deasserted by GPIO from the SoC. This is to keep the switch dead until it is configured properly by the kernel and user space. Prior to the referenced commit the switch was reset by the FEC driver and the reset GPIO was actively deasserted. The mdio-bus was scanned and the attached switch and its PHYs were found and configured. With the referenced commit the switch is reset by the qca8k driver. Because of another bug in the qca8k driver, functionality of the reset pin depends on its pre-kernel configuration. See commit c44fc98f0a8f ("net: dsa: qca8k: fix illegal usage of GPIO") The problem did not appear until we removed support for the switch and configuration of its reset pin from the bootloader. To fix that, properly describe the internal mdio-bus configuration of the qca8334 switch. The PHYs are internal to the switch and sit on its internal mdio-bus. Fixes: 7da7b84fee58 ("ARM: dts: imx6dl-yapp4: Move phy reset into switch node") Signed-off-by: Michal Vokáč --- changes in v2: - none arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi | 23 ++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi index 5763f8253d51..eec1f9092572 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi @@ -133,14 +133,6 @@ #address-cells = <1>; #size-cells = <0>; - phy_port2: phy@1 { - reg = <1>; - }; - - phy_port3: phy@2 { - reg = <2>; - }; - switch@10 { compatible = "qca,qca8334"; reg = <0x10>; @@ -165,15 +157,30 @@ eth2: port@2 { reg = <2>; label = "eth2"; + phy-mode = "internal"; phy-handle = <&phy_port2>; }; eth1: port@3 { reg = <3>; label = "eth1"; + phy-mode = "internal"; phy-handle = <&phy_port3>; }; }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port2: ethernet-phy@1 { + reg = <1>; + }; + + phy_port3: ethernet-phy@2 { + reg = <2>; + }; + }; }; }; }; -- 2.1.4