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From: Shengjiu Wang <shengjiu.wang@nxp.com>
To: p.zabel@pengutronix.de, abelvesa@kernel.org, peng.fan@nxp.com,
	mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org,
	s.hauer@pengutronix.de, kernel@pengutronix.de,
	festevam@gmail.com, marex@denx.de, linux-clk@vger.kernel.org,
	imx@lists.linux.dev, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, shengjiu.wang@gmail.com
Subject: [PATCH v6 4/5] clk: imx: clk-audiomix: Add CLK_SET_RATE_PARENT flags for clocks
Date: Thu, 30 May 2024 10:31:17 +0800	[thread overview]
Message-ID: <1717036278-3515-5-git-send-email-shengjiu.wang@nxp.com> (raw)
In-Reply-To: <1717036278-3515-1-git-send-email-shengjiu.wang@nxp.com>

Add CLK_SET_RATE_PARENT flags that when the device driver sets the
child clock rate, parent clock frequency can be refined accordingly.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-imx8mp-audiomix.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c
index a3dc2f3606ee..ad6eceb419cc 100644
--- a/drivers/clk/imx/clk-imx8mp-audiomix.c
+++ b/drivers/clk/imx/clk-imx8mp-audiomix.c
@@ -325,12 +325,12 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
 	for (i = 0; i < ARRAY_SIZE(sels); i++) {
 		if (sels[i].num_parents == 1) {
 			hw = devm_clk_hw_register_gate_parent_data(dev,
-				sels[i].name, &sels[i].parent, 0,
+				sels[i].name, &sels[i].parent, CLK_SET_RATE_PARENT,
 				base + sels[i].reg, sels[i].shift, 0, NULL);
 		} else {
 			hw = devm_clk_hw_register_mux_parent_data_table(dev,
 				sels[i].name, sels[i].parents,
-				sels[i].num_parents, 0,
+				sels[i].num_parents, CLK_SET_RATE_PARENT,
 				base + sels[i].reg,
 				sels[i].shift, sels[i].width,
 				0, NULL, NULL);
@@ -373,7 +373,8 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
 	clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS] = hw;
 
 	hw = devm_clk_hw_register_gate(dev, "sai_pll_out", "sai_pll_bypass",
-				       0, base + SAI_PLL_GNRL_CTL, 13,
+				       CLK_SET_RATE_PARENT,
+				       base + SAI_PLL_GNRL_CTL, 13,
 				       0, NULL);
 	if (IS_ERR(hw)) {
 		ret = PTR_ERR(hw);
@@ -382,7 +383,8 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
 	clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT] = hw;
 
 	hw = devm_clk_hw_register_fixed_factor(dev, "sai_pll_out_div2",
-					       "sai_pll_out", 0, 1, 2);
+					       "sai_pll_out",
+					       CLK_SET_RATE_PARENT, 1, 2);
 	if (IS_ERR(hw)) {
 		ret = PTR_ERR(hw);
 		goto err_clk_register;
-- 
2.34.1


  parent reply	other threads:[~2024-05-30  2:47 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-30  2:31 [PATCH v6 0/5] clk: imx: clk-audiomix: Improvement for audiomix Shengjiu Wang
2024-05-30  2:31 ` [PATCH v6 1/5] dt-bindings: clock: imx8mp: Add #reset-cells property Shengjiu Wang
2024-05-30  2:31 ` [PATCH v6 2/5] clk: imx: clk-audiomix: Add reset controller Shengjiu Wang
2024-05-30  8:51   ` Marco Felsch
2024-06-11  2:34     ` Shengjiu Wang
2024-05-30  2:31 ` [PATCH v6 3/5] reset: imx-aux: Add i.MX auxiliary reset driver Shengjiu Wang
2024-05-30  9:05   ` Marco Felsch
2024-05-30 15:53     ` Frank Li
2024-05-30 16:45       ` Marco Felsch
2024-05-30 18:33         ` Frank Li
2024-06-11  6:55           ` Shengjiu Wang
2024-06-04  3:57     ` Shengjiu Wang
2024-05-30  2:31 ` Shengjiu Wang [this message]
2024-05-30  2:31 ` [PATCH v6 5/5] clk: imx: clk-audiomix: Correct parent clock for earc_phy and audpll Shengjiu Wang

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