[PATCH v8 0/5] clk: imx: clk-audiomix: Improvement for audiomix

[PATCH v8 0/5] clk: imx: clk-audiomix: Improvement for audiomix

[Shengjiu Wang]

Some improvement for audiomix driver:
Add CLK_SET_RATE_PARENT flags for clocks
Correct parent clock for earc_phy and audpll clocks.
Add reset controller for EARC function, use the auxiliary device
framework:
https://lore.kernel.org/lkml/b86c83a520f0c45a60249468fa92b1de.sboyd@kernel.org/

changes in v8:
- drop '_priv' and add 'to_imx8mp_audiomix_reset()' in reset-imx8mp-audiomix.c
- update to 'select AUXILIARY_BUS if RESET_CONTROLLER'

changes in v7:
- add property "#reset-cells" exist check
- change the reset driver to be specific for 8MP-audiomix
  remove the design for general usage.

changes in v6:
- fix type for "correct"
- fix coding style for " * adev"

changes in v5:
- fix miss header issue reported by kernel test robot
  https://lore.kernel.org/oe-kbuild-all/202405201844.zf7UkDmq-lkp@intel.com/
- use scoped free

changes in v4:
- use auxiliary device framework for reset controller driver.
- drop syscon and simple-mfd related changes in v3

changes in v3:
- separate reset driver to driver/reset/
- add binding doc for reset driver.
- modify imx8mp.dtsi accordingly

changes in v2:
- add more info in commit messages

Shengjiu Wang (5):
  dt-bindings: clock: imx8mp: Add #reset-cells property
  clk: imx: clk-audiomix: Add reset controller
  reset: imx8mp-audiomix: Add AudioMix Block Control reset driver
  clk: imx: clk-audiomix: Add CLK_SET_RATE_PARENT flags for clocks
  clk: imx: clk-audiomix: Correct parent clock for earc_phy and audpll

 .../bindings/clock/imx8mp-audiomix.yaml       |   3 +
 drivers/clk/imx/Kconfig                       |   1 +
 drivers/clk/imx/clk-imx8mp-audiomix.c         |  86 +++++++++++++-
 drivers/reset/Kconfig                         |   8 ++
 drivers/reset/Makefile                        |   1 +
 drivers/reset/reset-imx8mp-audiomix.c         | 106 ++++++++++++++++++
 6 files changed, 199 insertions(+), 6 deletions(-)
 create mode 100644 drivers/reset/reset-imx8mp-audiomix.c

-- 
2.34.1

[PATCH v8 1/5] dt-bindings: clock: imx8mp: Add #reset-cells property

[Shengjiu Wang]

The Audio Block Control contains clock distribution and gating
controls, as well as reset handling to several of the AUDIOMIX
peripherals. Especially the reset controls for Enhanced Audio
Return Channel (EARC) PHY and Controller.

So make Audio Block Control a reset provider for EARC, which
is one of modules in this audio subsystem.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml b/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml
index 0a6dc1a6e122..6588a17a7d9a 100644
--- a/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml
+++ b/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml
@@ -44,6 +44,9 @@ properties:
       ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h
       for the full list of i.MX8MP IMX8MP_CLK_AUDIOMIX_ clock IDs.
 
+  '#reset-cells':
+    const: 1
+
 required:
   - compatible
   - reg
-- 
2.34.1

[PATCH v8 2/5] clk: imx: clk-audiomix: Add reset controller

[Shengjiu Wang]

Audiomix block control can be a reset controller for
Enhanced Audio Return Channel (EARC), which is one of
modules in this audiomix subsystem.

The reset controller is supported by the auxiliary device
framework.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
 drivers/clk/imx/Kconfig               |  1 +
 drivers/clk/imx/clk-imx8mp-audiomix.c | 63 +++++++++++++++++++++++++++
 2 files changed, 64 insertions(+)

diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig
index 6da0fba68225..6ff6d934848a 100644
--- a/drivers/clk/imx/Kconfig
+++ b/drivers/clk/imx/Kconfig
@@ -81,6 +81,7 @@ config CLK_IMX8MP
 	tristate "IMX8MP CCM Clock Driver"
 	depends on ARCH_MXC || COMPILE_TEST
 	select MXC_CLK
+	select AUXILIARY_BUS if RESET_CONTROLLER
 	help
 	    Build the driver for i.MX8MP CCM Clock Driver
 
diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c
index b381d6f784c8..517b1f88661b 100644
--- a/drivers/clk/imx/clk-imx8mp-audiomix.c
+++ b/drivers/clk/imx/clk-imx8mp-audiomix.c
@@ -5,6 +5,7 @@
  * Copyright (C) 2022 Marek Vasut <marex@denx.de>
  */
 
+#include <linux/auxiliary_bus.h>
 #include <linux/clk-provider.h>
 #include <linux/device.h>
 #include <linux/io.h>
@@ -13,6 +14,7 @@
 #include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
+#include <linux/slab.h>
 
 #include <dt-bindings/clock/imx8mp-clock.h>
 
@@ -217,6 +219,63 @@ struct clk_imx8mp_audiomix_priv {
 	struct clk_hw_onecell_data clk_data;
 };
 
+#if IS_ENABLED(CONFIG_RESET_CONTROLLER)
+
+static void clk_imx8mp_audiomix_reset_unregister_adev(void *_adev)
+{
+	struct auxiliary_device *adev = _adev;
+
+	auxiliary_device_delete(adev);
+	auxiliary_device_uninit(adev);
+}
+
+static void clk_imx8mp_audiomix_reset_adev_release(struct device *dev)
+{
+	struct auxiliary_device *adev = to_auxiliary_dev(dev);
+
+	kfree(adev);
+}
+
+static int clk_imx8mp_audiomix_reset_controller_register(struct device *dev,
+							 struct clk_imx8mp_audiomix_priv *priv)
+{
+	struct auxiliary_device *adev __free(kfree) = NULL;
+	int ret;
+
+	if (!of_property_present(dev->of_node, "#reset-cells"))
+		return 0;
+
+	adev = kzalloc(sizeof(*adev), GFP_KERNEL);
+	if (!adev)
+		return -ENOMEM;
+
+	adev->name = "reset";
+	adev->dev.parent = dev;
+	adev->dev.release = clk_imx8mp_audiomix_reset_adev_release;
+
+	ret = auxiliary_device_init(adev);
+	if (ret)
+		return ret;
+
+	ret = auxiliary_device_add(adev);
+	if (ret) {
+		auxiliary_device_uninit(adev);
+		return ret;
+	}
+
+	return devm_add_action_or_reset(dev, clk_imx8mp_audiomix_reset_unregister_adev,
+					no_free_ptr(adev));
+}
+
+#else /* !CONFIG_RESET_CONTROLLER */
+
+static int clk_imx8mp_audiomix_reset_controller_register(struct clk_imx8mp_audiomix_priv *priv)
+{
+	return 0;
+}
+
+#endif /* !CONFIG_RESET_CONTROLLER */
+
 static void clk_imx8mp_audiomix_save_restore(struct device *dev, bool save)
 {
 	struct clk_imx8mp_audiomix_priv *priv = dev_get_drvdata(dev);
@@ -337,6 +396,10 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
 	if (ret)
 		goto err_clk_register;
 
+	ret = clk_imx8mp_audiomix_reset_controller_register(dev, priv);
+	if (ret)
+		goto err_clk_register;
+
 	pm_runtime_put_sync(dev);
 	return 0;
 
-- 
2.34.1

Re: [PATCH v8 2/5] clk: imx: clk-audiomix: Add reset controller

[Marco Felsch]

On 24-06-14, Shengjiu Wang wrote:
> Audiomix block control can be a reset controller for
> Enhanced Audio Return Channel (EARC), which is one of
> modules in this audiomix subsystem.
> 
> The reset controller is supported by the auxiliary device
> framework.
> 
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>

Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>

[PATCH v8 3/5] reset: imx8mp-audiomix: Add AudioMix Block Control reset driver

[Shengjiu Wang]

Add support for the resets on i.MX8MP Audio Block Control module,
which includes the EARC PHY software reset and EARC controller
software reset. The reset controller is created using the auxiliary
device framework and set up in the clock driver.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
---
 drivers/reset/Kconfig                 |   8 ++
 drivers/reset/Makefile                |   1 +
 drivers/reset/reset-imx8mp-audiomix.c | 106 ++++++++++++++++++++++++++
 3 files changed, 115 insertions(+)
 create mode 100644 drivers/reset/reset-imx8mp-audiomix.c

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 7112f5932609..b3c0e528d08c 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -91,6 +91,14 @@ config RESET_IMX7
 	help
 	  This enables the reset controller driver for i.MX7 SoCs.
 
+config RESET_IMX8MP_AUDIOMIX
+	tristate "i.MX8MP AudioMix Reset Driver"
+	depends on CLK_IMX8MP
+	select AUXILIARY_BUS
+	default CLK_IMX8MP
+	help
+	  This enables the reset controller driver for i.MX8MP AudioMix
+
 config RESET_INTEL_GW
 	bool "Intel Reset Controller Driver"
 	depends on X86 || COMPILE_TEST
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index fd8b49fa46fc..a6796e83900b 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
 obj-$(CONFIG_RESET_GPIO) += reset-gpio.o
 obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
 obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
+obj-$(CONFIG_RESET_IMX8MP_AUDIOMIX) += reset-imx8mp-audiomix.o
 obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o
 obj-$(CONFIG_RESET_K210) += reset-k210.o
 obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
diff --git a/drivers/reset/reset-imx8mp-audiomix.c b/drivers/reset/reset-imx8mp-audiomix.c
new file mode 100644
index 000000000000..1fc984bc08c0
--- /dev/null
+++ b/drivers/reset/reset-imx8mp-audiomix.c
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2024 NXP
+ */
+
+#include <linux/auxiliary_bus.h>
+#include <linux/device.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#define EARC			0x200
+#define EARC_RESET_MASK		0x3
+
+struct imx8mp_audiomix_reset {
+	struct reset_controller_dev rcdev;
+	void __iomem *base;
+};
+
+static struct imx8mp_audiomix_reset *to_imx8mp_audiomix_reset(struct reset_controller_dev *rcdev)
+{
+	return container_of(rcdev, struct imx8mp_audiomix_reset, rcdev);
+}
+
+static int imx8mp_audiomix_reset_assert(struct reset_controller_dev *rcdev,
+					unsigned long id)
+{
+	struct imx8mp_audiomix_reset *priv = to_imx8mp_audiomix_reset(rcdev);
+	void __iomem *reg_addr = priv->base;
+	unsigned int mask, reg;
+
+	if (id >= fls(EARC_RESET_MASK))
+		return -EINVAL;
+
+	mask = BIT(id);
+	reg = readl(reg_addr + EARC);
+	writel(reg & ~mask, reg_addr + EARC);
+
+	return 0;
+}
+
+static int imx8mp_audiomix_reset_deassert(struct reset_controller_dev *rcdev,
+					  unsigned long id)
+{
+	struct imx8mp_audiomix_reset *priv = to_imx8mp_audiomix_reset(rcdev);
+	void __iomem *reg_addr = priv->base;
+	unsigned int mask, reg;
+
+	if (id >= fls(EARC_RESET_MASK))
+		return -EINVAL;
+
+	mask = BIT(id);
+	reg = readl(reg_addr + EARC);
+	writel(reg | mask, reg_addr + EARC);
+
+	return 0;
+}
+
+static const struct reset_control_ops imx8mp_audiomix_reset_ops = {
+	.assert   = imx8mp_audiomix_reset_assert,
+	.deassert = imx8mp_audiomix_reset_deassert,
+};
+
+static int imx8mp_audiomix_reset_probe(struct auxiliary_device *adev,
+				       const struct auxiliary_device_id *id)
+{
+	struct imx8mp_audiomix_reset *priv;
+	struct device *dev = &adev->dev;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->rcdev.owner     = THIS_MODULE;
+	priv->rcdev.nr_resets = fls(EARC_RESET_MASK);
+	priv->rcdev.ops       = &imx8mp_audiomix_reset_ops;
+	priv->rcdev.of_node   = dev->parent->of_node;
+	priv->rcdev.dev	      = dev;
+	priv->rcdev.of_reset_n_cells = 1;
+	priv->base            = of_iomap(dev->parent->of_node, 0);
+
+	return devm_reset_controller_register(dev, &priv->rcdev);
+}
+
+static const struct auxiliary_device_id imx8mp_audiomix_reset_ids[] = {
+	{
+		.name = "clk_imx8mp_audiomix.reset",
+	},
+	{ }
+};
+MODULE_DEVICE_TABLE(auxiliary, imx8mp_audiomix_reset_ids);
+
+static struct auxiliary_driver imx8mp_audiomix_reset_driver = {
+	.probe		= imx8mp_audiomix_reset_probe,
+	.id_table	= imx8mp_audiomix_reset_ids,
+};
+
+module_auxiliary_driver(imx8mp_audiomix_reset_driver);
+
+MODULE_AUTHOR("Shengjiu Wang <shengjiu.wang@nxp.com>");
+MODULE_DESCRIPTION("Freescale i.MX8MP Audio Block Controller reset driver");
+MODULE_LICENSE("GPL");
-- 
2.34.1

Re: [PATCH v8 3/5] reset: imx8mp-audiomix: Add AudioMix Block Control reset driver

[Philipp Zabel]

Hi,

On Fr, 2024-06-14 at 15:42 +0800, Shengjiu Wang wrote:
> Add support for the resets on i.MX8MP Audio Block Control module,
> which includes the EARC PHY software reset and EARC controller
> software reset. The reset controller is created using the auxiliary
> device framework and set up in the clock driver.
> 
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
> ---
>  drivers/reset/Kconfig                 |   8 ++
>  drivers/reset/Makefile                |   1 +
>  drivers/reset/reset-imx8mp-audiomix.c | 106 ++++++++++++++++++++++++++
>  3 files changed, 115 insertions(+)
>  create mode 100644 drivers/reset/reset-imx8mp-audiomix.c
> 
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 7112f5932609..b3c0e528d08c 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -91,6 +91,14 @@ config RESET_IMX7
>  	help
>  	  This enables the reset controller driver for i.MX7 SoCs.
>  
> +config RESET_IMX8MP_AUDIOMIX
> +	tristate "i.MX8MP AudioMix Reset Driver"
> +	depends on CLK_IMX8MP

I'd like this to be made compile-testable without CLK_IMX8MP being
enabled.

> +	select AUXILIARY_BUS
> +	default CLK_IMX8MP
> +	help
> +	  This enables the reset controller driver for i.MX8MP AudioMix
> +
>  config RESET_INTEL_GW
>  	bool "Intel Reset Controller Driver"
>  	depends on X86 || COMPILE_TEST
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index fd8b49fa46fc..a6796e83900b 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
>  obj-$(CONFIG_RESET_GPIO) += reset-gpio.o
>  obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
>  obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
> +obj-$(CONFIG_RESET_IMX8MP_AUDIOMIX) += reset-imx8mp-audiomix.o
>  obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o
>  obj-$(CONFIG_RESET_K210) += reset-k210.o
>  obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
> diff --git a/drivers/reset/reset-imx8mp-audiomix.c b/drivers/reset/reset-imx8mp-audiomix.c
> new file mode 100644
> index 000000000000..1fc984bc08c0
> --- /dev/null
> +++ b/drivers/reset/reset-imx8mp-audiomix.c
> @@ -0,0 +1,106 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright 2024 NXP
> + */
> +
> +#include <linux/auxiliary_bus.h>
> +#include <linux/device.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>

Still needed?

> +#include <linux/reset-controller.h>
> +
> +#define EARC			0x200
> +#define EARC_RESET_MASK		0x3
> +
> +struct imx8mp_audiomix_reset {
> +	struct reset_controller_dev rcdev;
> +	void __iomem *base;
> +};
> +
> +static struct imx8mp_audiomix_reset *to_imx8mp_audiomix_reset(struct reset_controller_dev *rcdev)
> +{
> +	return container_of(rcdev, struct imx8mp_audiomix_reset, rcdev);
> +}
> +
> +static int imx8mp_audiomix_reset_assert(struct reset_controller_dev *rcdev,
> +					unsigned long id)
> +{
> +	struct imx8mp_audiomix_reset *priv = to_imx8mp_audiomix_reset(rcdev);
> +	void __iomem *reg_addr = priv->base;
> +	unsigned int mask, reg;
> +
> +	if (id >= fls(EARC_RESET_MASK))
> +		return -EINVAL;

This check is not required.

Since you have nr_resets set to fls(EARC_RESET_MASK), the same is
already checked in of_reset_simple_xlate, before a reset control is
even returned.

> +	mask = BIT(id);
> +	reg = readl(reg_addr + EARC);
> +	writel(reg & ~mask, reg_addr + EARC);

There are multiple (well, two) resets in this register, so it would be
good style to protect the read-modify-write cycle with a spinlock.

> +
> +	return 0;
> +}
> +
> +static int imx8mp_audiomix_reset_deassert(struct reset_controller_dev *rcdev,
> +					  unsigned long id)
> +{
> +	struct imx8mp_audiomix_reset *priv = to_imx8mp_audiomix_reset(rcdev);
> +	void __iomem *reg_addr = priv->base;
> +	unsigned int mask, reg;
> +
> +	if (id >= fls(EARC_RESET_MASK))
> +		return -EINVAL;
> +
> +	mask = BIT(id);
> +	reg = readl(reg_addr + EARC);
> +	writel(reg | mask, reg_addr + EARC);
> +
> +	return 0;
> +}
> +
> +static const struct reset_control_ops imx8mp_audiomix_reset_ops = {
> +	.assert   = imx8mp_audiomix_reset_assert,
> +	.deassert = imx8mp_audiomix_reset_deassert,
> +};
> +
> +static int imx8mp_audiomix_reset_probe(struct auxiliary_device *adev,
> +				       const struct auxiliary_device_id *id)
> +{
> +	struct imx8mp_audiomix_reset *priv;
> +	struct device *dev = &adev->dev;
> +
> +	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> +	if (!priv)
> +		return -ENOMEM;
> +
> +	priv->rcdev.owner     = THIS_MODULE;
> +	priv->rcdev.nr_resets = fls(EARC_RESET_MASK);
> +	priv->rcdev.ops       = &imx8mp_audiomix_reset_ops;
> +	priv->rcdev.of_node   = dev->parent->of_node;
> +	priv->rcdev.dev	      = dev;
> +	priv->rcdev.of_reset_n_cells = 1;
> +	priv->base            = of_iomap(dev->parent->of_node, 0);

This is missing the corresponding iounmap().

I wonder why we map at all. If the parent driver already has iomem
mapped, can't it just pass that in, like JH7110 does?


regards
Philipp

Re: [PATCH v8 3/5] reset: imx8mp-audiomix: Add AudioMix Block Control reset driver

[Shengjiu Wang]

On Fri, Jun 21, 2024 at 6:59 PM Philipp Zabel <p.zabel@pengutronix.de> wrote:
>
> Hi,
>
> On Fr, 2024-06-14 at 15:42 +0800, Shengjiu Wang wrote:
> > Add support for the resets on i.MX8MP Audio Block Control module,
> > which includes the EARC PHY software reset and EARC controller
> > software reset. The reset controller is created using the auxiliary
> > device framework and set up in the clock driver.
> >
> > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> > Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
> > ---
> >  drivers/reset/Kconfig                 |   8 ++
> >  drivers/reset/Makefile                |   1 +
> >  drivers/reset/reset-imx8mp-audiomix.c | 106 ++++++++++++++++++++++++++
> >  3 files changed, 115 insertions(+)
> >  create mode 100644 drivers/reset/reset-imx8mp-audiomix.c
> >
> > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> > index 7112f5932609..b3c0e528d08c 100644
> > --- a/drivers/reset/Kconfig
> > +++ b/drivers/reset/Kconfig
> > @@ -91,6 +91,14 @@ config RESET_IMX7
> >       help
> >         This enables the reset controller driver for i.MX7 SoCs.
> >
> > +config RESET_IMX8MP_AUDIOMIX
> > +     tristate "i.MX8MP AudioMix Reset Driver"
> > +     depends on CLK_IMX8MP
>
> I'd like this to be made compile-testable without CLK_IMX8MP being
> enabled.

Ok, will remove the depends.

>
> > +     select AUXILIARY_BUS
> > +     default CLK_IMX8MP
> > +     help
> > +       This enables the reset controller driver for i.MX8MP AudioMix
> > +
> >  config RESET_INTEL_GW
> >       bool "Intel Reset Controller Driver"
> >       depends on X86 || COMPILE_TEST
> > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> > index fd8b49fa46fc..a6796e83900b 100644
> > --- a/drivers/reset/Makefile
> > +++ b/drivers/reset/Makefile
> > @@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
> >  obj-$(CONFIG_RESET_GPIO) += reset-gpio.o
> >  obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
> >  obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
> > +obj-$(CONFIG_RESET_IMX8MP_AUDIOMIX) += reset-imx8mp-audiomix.o
> >  obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o
> >  obj-$(CONFIG_RESET_K210) += reset-k210.o
> >  obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
> > diff --git a/drivers/reset/reset-imx8mp-audiomix.c b/drivers/reset/reset-imx8mp-audiomix.c
> > new file mode 100644
> > index 000000000000..1fc984bc08c0
> > --- /dev/null
> > +++ b/drivers/reset/reset-imx8mp-audiomix.c
> > @@ -0,0 +1,106 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +/*
> > + * Copyright 2024 NXP
> > + */
> > +
> > +#include <linux/auxiliary_bus.h>
> > +#include <linux/device.h>
> > +#include <linux/io.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/platform_device.h>
>
> Still needed?

Ok, can be removed.

>
> > +#include <linux/reset-controller.h>
> > +
> > +#define EARC                 0x200
> > +#define EARC_RESET_MASK              0x3
> > +
> > +struct imx8mp_audiomix_reset {
> > +     struct reset_controller_dev rcdev;
> > +     void __iomem *base;
> > +};
> > +
> > +static struct imx8mp_audiomix_reset *to_imx8mp_audiomix_reset(struct reset_controller_dev *rcdev)
> > +{
> > +     return container_of(rcdev, struct imx8mp_audiomix_reset, rcdev);
> > +}
> > +
> > +static int imx8mp_audiomix_reset_assert(struct reset_controller_dev *rcdev,
> > +                                     unsigned long id)
> > +{
> > +     struct imx8mp_audiomix_reset *priv = to_imx8mp_audiomix_reset(rcdev);
> > +     void __iomem *reg_addr = priv->base;
> > +     unsigned int mask, reg;
> > +
> > +     if (id >= fls(EARC_RESET_MASK))
> > +             return -EINVAL;
>
> This check is not required.
>
> Since you have nr_resets set to fls(EARC_RESET_MASK), the same is
> already checked in of_reset_simple_xlate, before a reset control is
> even returned.

Ok, will remove it.

>
> > +     mask = BIT(id);
> > +     reg = readl(reg_addr + EARC);
> > +     writel(reg & ~mask, reg_addr + EARC);
>
> There are multiple (well, two) resets in this register, so it would be
> good style to protect the read-modify-write cycle with a spinlock.

Ok, will add spinlock

>
> > +
> > +     return 0;
> > +}
> > +
> > +static int imx8mp_audiomix_reset_deassert(struct reset_controller_dev *rcdev,
> > +                                       unsigned long id)
> > +{
> > +     struct imx8mp_audiomix_reset *priv = to_imx8mp_audiomix_reset(rcdev);
> > +     void __iomem *reg_addr = priv->base;
> > +     unsigned int mask, reg;
> > +
> > +     if (id >= fls(EARC_RESET_MASK))
> > +             return -EINVAL;
> > +
> > +     mask = BIT(id);
> > +     reg = readl(reg_addr + EARC);
> > +     writel(reg | mask, reg_addr + EARC);
> > +
> > +     return 0;
> > +}
> > +
> > +static const struct reset_control_ops imx8mp_audiomix_reset_ops = {
> > +     .assert   = imx8mp_audiomix_reset_assert,
> > +     .deassert = imx8mp_audiomix_reset_deassert,
> > +};
> > +
> > +static int imx8mp_audiomix_reset_probe(struct auxiliary_device *adev,
> > +                                    const struct auxiliary_device_id *id)
> > +{
> > +     struct imx8mp_audiomix_reset *priv;
> > +     struct device *dev = &adev->dev;
> > +
> > +     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> > +     if (!priv)
> > +             return -ENOMEM;
> > +
> > +     priv->rcdev.owner     = THIS_MODULE;
> > +     priv->rcdev.nr_resets = fls(EARC_RESET_MASK);
> > +     priv->rcdev.ops       = &imx8mp_audiomix_reset_ops;
> > +     priv->rcdev.of_node   = dev->parent->of_node;
> > +     priv->rcdev.dev       = dev;
> > +     priv->rcdev.of_reset_n_cells = 1;
> > +     priv->base            = of_iomap(dev->parent->of_node, 0);
>
> This is missing the corresponding iounmap().

Ok, will add iounmap.

>
> I wonder why we map at all. If the parent driver already has iomem
> mapped, can't it just pass that in, like JH7110 does?

Because this is a simple reset driver, just two reset bits,
I want to avoid adding a header file for the parent driver and this driver.

Thanks for reviewing.

By the way: shall I just send a new version for this patch only next time?

Best regards
Shengjiu Wang
>
>
> regards
> Philipp

Re: [PATCH v8 3/5] reset: imx8mp-audiomix: Add AudioMix Block Control reset driver

[Philipp Zabel]

On Fr, 2024-06-21 at 20:34 +0800, Shengjiu Wang wrote:
> > I wonder why we map at all. If the parent driver already has iomem
> > mapped, can't it just pass that in, like JH7110 does?
> 
> Because this is a simple reset driver, just two reset bits,
> I want to avoid adding a header file for the parent driver and this driver.

Ok.

> Thanks for reviewing.
> 
> By the way: shall I just send a new version for this patch only next time?

Yes, this is the only remaining patch for me to pick up, no need to
resend the patches that were already applied.

regards
Philipp

[PATCH v8 4/5] clk: imx: clk-audiomix: Add CLK_SET_RATE_PARENT flags for clocks

[Shengjiu Wang]

Add CLK_SET_RATE_PARENT flags that when the device driver sets the
child clock rate, parent clock frequency can be refined accordingly.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-imx8mp-audiomix.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c
index 517b1f88661b..7fd336a96cfe 100644
--- a/drivers/clk/imx/clk-imx8mp-audiomix.c
+++ b/drivers/clk/imx/clk-imx8mp-audiomix.c
@@ -328,12 +328,12 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
 	for (i = 0; i < ARRAY_SIZE(sels); i++) {
 		if (sels[i].num_parents == 1) {
 			hw = devm_clk_hw_register_gate_parent_data(dev,
-				sels[i].name, &sels[i].parent, 0,
+				sels[i].name, &sels[i].parent, CLK_SET_RATE_PARENT,
 				base + sels[i].reg, sels[i].shift, 0, NULL);
 		} else {
 			hw = devm_clk_hw_register_mux_parent_data_table(dev,
 				sels[i].name, sels[i].parents,
-				sels[i].num_parents, 0,
+				sels[i].num_parents, CLK_SET_RATE_PARENT,
 				base + sels[i].reg,
 				sels[i].shift, sels[i].width,
 				0, NULL, NULL);
@@ -376,7 +376,8 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
 	clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS] = hw;
 
 	hw = devm_clk_hw_register_gate(dev, "sai_pll_out", "sai_pll_bypass",
-				       0, base + SAI_PLL_GNRL_CTL, 13,
+				       CLK_SET_RATE_PARENT,
+				       base + SAI_PLL_GNRL_CTL, 13,
 				       0, NULL);
 	if (IS_ERR(hw)) {
 		ret = PTR_ERR(hw);
@@ -385,7 +386,8 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
 	clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT] = hw;
 
 	hw = devm_clk_hw_register_fixed_factor(dev, "sai_pll_out_div2",
-					       "sai_pll_out", 0, 1, 2);
+					       "sai_pll_out",
+					       CLK_SET_RATE_PARENT, 1, 2);
 	if (IS_ERR(hw)) {
 		ret = PTR_ERR(hw);
 		goto err_clk_register;
-- 
2.34.1

[PATCH v8 5/5] clk: imx: clk-audiomix: Correct parent clock for earc_phy and audpll

[Shengjiu Wang]

According to Reference Manual of i.MX8MP
The parent clock of "earc_phy" is "sai_pll_out_div2",
The parent clock of "audpll" is "osc_24m".

Add CLK_GATE_PARENT() macro for usage of specifying parent clock.

Fixes: 6cd95f7b151c ("clk: imx: imx8mp: Add audiomix block control")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-imx8mp-audiomix.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c
index 7fd336a96cfe..50ad5873c990 100644
--- a/drivers/clk/imx/clk-imx8mp-audiomix.c
+++ b/drivers/clk/imx/clk-imx8mp-audiomix.c
@@ -156,6 +156,15 @@ static const struct clk_parent_data clk_imx8mp_audiomix_pll_bypass_sels[] = {
 		PDM_SEL, 2, 0						\
 	}
 
+#define CLK_GATE_PARENT(gname, cname, pname)						\
+	{								\
+		gname"_cg",						\
+		IMX8MP_CLK_AUDIOMIX_##cname,				\
+		{ .fw_name = pname, .name = pname }, NULL, 1,		\
+		CLKEN0 + 4 * !!(IMX8MP_CLK_AUDIOMIX_##cname / 32),	\
+		1, IMX8MP_CLK_AUDIOMIX_##cname % 32			\
+	}
+
 struct clk_imx8mp_audiomix_sel {
 	const char			*name;
 	int				clkid;
@@ -173,14 +182,14 @@ static struct clk_imx8mp_audiomix_sel sels[] = {
 	CLK_GATE("earc", EARC_IPG),
 	CLK_GATE("ocrama", OCRAMA_IPG),
 	CLK_GATE("aud2htx", AUD2HTX_IPG),
-	CLK_GATE("earc_phy", EARC_PHY),
+	CLK_GATE_PARENT("earc_phy", EARC_PHY, "sai_pll_out_div2"),
 	CLK_GATE("sdma2", SDMA2_ROOT),
 	CLK_GATE("sdma3", SDMA3_ROOT),
 	CLK_GATE("spba2", SPBA2_ROOT),
 	CLK_GATE("dsp", DSP_ROOT),
 	CLK_GATE("dspdbg", DSPDBG_ROOT),
 	CLK_GATE("edma", EDMA_ROOT),
-	CLK_GATE("audpll", AUDPLL_ROOT),
+	CLK_GATE_PARENT("audpll", AUDPLL_ROOT, "osc_24m"),
 	CLK_GATE("mu2", MU2_ROOT),
 	CLK_GATE("mu3", MU3_ROOT),
 	CLK_PDM,
-- 
2.34.1

Re: [PATCH v8 0/5] clk: imx: clk-audiomix: Improvement for audiomix

[Abel Vesa]

On Fri, 14 Jun 2024 15:41:58 +0800, Shengjiu Wang wrote:
> Some improvement for audiomix driver:
> Add CLK_SET_RATE_PARENT flags for clocks
> Correct parent clock for earc_phy and audpll clocks.
> Add reset controller for EARC function, use the auxiliary device
> framework:
> https://lore.kernel.org/lkml/b86c83a520f0c45a60249468fa92b1de.sboyd@kernel.org/
> 
> [...]

Applied, thanks!

[1/5] dt-bindings: clock: imx8mp: Add #reset-cells property
      commit: d7d9ef1f40dc0639ba0901097139fcdc4bedb32e
[2/5] clk: imx: clk-audiomix: Add reset controller
      commit: 6f0e817175c5b2e453f7ad6a4e9a8a7fd904ee4a
[3/5] reset: imx8mp-audiomix: Add AudioMix Block Control reset driver
      commit: b7604e8b805a6e52161ff98728122005e6975a46
[4/5] clk: imx: clk-audiomix: Add CLK_SET_RATE_PARENT flags for clocks
      commit: 163e678c0b24d0e45f617f4496c4ae9b1afd8d63
[5/5] clk: imx: clk-audiomix: Correct parent clock for earc_phy and audpll
      commit: 22fb849ead1b109f868e83b309223d906e4b7d96

Best regards,
-- 
Abel Vesa <abel.vesa@linaro.org>

Re: [PATCH v8 0/5] clk: imx: clk-audiomix: Improvement for audiomix

[Abel Vesa]

On 24-06-21 09:26:52, Abel Vesa wrote:
> 
> On Fri, 14 Jun 2024 15:41:58 +0800, Shengjiu Wang wrote:
> > Some improvement for audiomix driver:
> > Add CLK_SET_RATE_PARENT flags for clocks
> > Correct parent clock for earc_phy and audpll clocks.
> > Add reset controller for EARC function, use the auxiliary device
> > framework:
> > https://lore.kernel.org/lkml/b86c83a520f0c45a60249468fa92b1de.sboyd@kernel.org/
> > 
> > [...]
> 
> Applied, thanks!
> 
> [1/5] dt-bindings: clock: imx8mp: Add #reset-cells property
>       commit: d7d9ef1f40dc0639ba0901097139fcdc4bedb32e
> [2/5] clk: imx: clk-audiomix: Add reset controller
>       commit: 6f0e817175c5b2e453f7ad6a4e9a8a7fd904ee4a
> [3/5] reset: imx8mp-audiomix: Add AudioMix Block Control reset driver
>       commit: b7604e8b805a6e52161ff98728122005e6975a46

Dropped the this one. Needs to go through different tree.

> [4/5] clk: imx: clk-audiomix: Add CLK_SET_RATE_PARENT flags for clocks
>       commit: 163e678c0b24d0e45f617f4496c4ae9b1afd8d63
> [5/5] clk: imx: clk-audiomix: Correct parent clock for earc_phy and audpll
>       commit: 22fb849ead1b109f868e83b309223d906e4b7d96
> 
> Best regards,
> -- 
> Abel Vesa <abel.vesa@linaro.org>
> 

Re: [PATCH v8 0/5] clk: imx: clk-audiomix: Improvement for audiomix

[Shengjiu Wang]

Hi Philipp Zabel

On Fri, Jun 21, 2024 at 2:36 PM Abel Vesa <abel.vesa@linaro.org> wrote:
>
> On 24-06-21 09:26:52, Abel Vesa wrote:
> >
> > On Fri, 14 Jun 2024 15:41:58 +0800, Shengjiu Wang wrote:
> > > Some improvement for audiomix driver:
> > > Add CLK_SET_RATE_PARENT flags for clocks
> > > Correct parent clock for earc_phy and audpll clocks.
> > > Add reset controller for EARC function, use the auxiliary device
> > > framework:
> > > https://lore.kernel.org/lkml/b86c83a520f0c45a60249468fa92b1de.sboyd@kernel.org/
> > >
> > > [...]
> >
> > Applied, thanks!
> >
> > [1/5] dt-bindings: clock: imx8mp: Add #reset-cells property
> >       commit: d7d9ef1f40dc0639ba0901097139fcdc4bedb32e
> > [2/5] clk: imx: clk-audiomix: Add reset controller
> >       commit: 6f0e817175c5b2e453f7ad6a4e9a8a7fd904ee4a
> > [3/5] reset: imx8mp-audiomix: Add AudioMix Block Control reset driver
> >       commit: b7604e8b805a6e52161ff98728122005e6975a46
>
> Dropped the this one. Needs to go through different tree.

In case that you may miss this commit which is in a clock driver patch set.
Could you please have a review?  Thanks.

https://lore.kernel.org/linux-arm-kernel/20240614101727.zkh32bqe5nurnmbx@pengutronix.de/T/#m4bd8091438d9fbe0bd1400005d681483c59607c7

Best regards
Shengjiu Wang

>
> > [4/5] clk: imx: clk-audiomix: Add CLK_SET_RATE_PARENT flags for clocks
> >       commit: 163e678c0b24d0e45f617f4496c4ae9b1afd8d63
> > [5/5] clk: imx: clk-audiomix: Correct parent clock for earc_phy and audpll
> >       commit: 22fb849ead1b109f868e83b309223d906e4b7d96
> >
> > Best regards,
> > --
> > Abel Vesa <abel.vesa@linaro.org>
> >