From: Shengjiu Wang <shengjiu.wang@nxp.com>
To: p.zabel@pengutronix.de, abelvesa@kernel.org, peng.fan@nxp.com,
mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, marex@denx.de, linux-clk@vger.kernel.org,
imx@lists.linux.dev, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, shengjiu.wang@gmail.com
Subject: [PATCH v8 4/5] clk: imx: clk-audiomix: Add CLK_SET_RATE_PARENT flags for clocks
Date: Fri, 14 Jun 2024 15:42:02 +0800 [thread overview]
Message-ID: <1718350923-21392-5-git-send-email-shengjiu.wang@nxp.com> (raw)
In-Reply-To: <1718350923-21392-1-git-send-email-shengjiu.wang@nxp.com>
Add CLK_SET_RATE_PARENT flags that when the device driver sets the
child clock rate, parent clock frequency can be refined accordingly.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---
drivers/clk/imx/clk-imx8mp-audiomix.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c
index 517b1f88661b..7fd336a96cfe 100644
--- a/drivers/clk/imx/clk-imx8mp-audiomix.c
+++ b/drivers/clk/imx/clk-imx8mp-audiomix.c
@@ -328,12 +328,12 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
for (i = 0; i < ARRAY_SIZE(sels); i++) {
if (sels[i].num_parents == 1) {
hw = devm_clk_hw_register_gate_parent_data(dev,
- sels[i].name, &sels[i].parent, 0,
+ sels[i].name, &sels[i].parent, CLK_SET_RATE_PARENT,
base + sels[i].reg, sels[i].shift, 0, NULL);
} else {
hw = devm_clk_hw_register_mux_parent_data_table(dev,
sels[i].name, sels[i].parents,
- sels[i].num_parents, 0,
+ sels[i].num_parents, CLK_SET_RATE_PARENT,
base + sels[i].reg,
sels[i].shift, sels[i].width,
0, NULL, NULL);
@@ -376,7 +376,8 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS] = hw;
hw = devm_clk_hw_register_gate(dev, "sai_pll_out", "sai_pll_bypass",
- 0, base + SAI_PLL_GNRL_CTL, 13,
+ CLK_SET_RATE_PARENT,
+ base + SAI_PLL_GNRL_CTL, 13,
0, NULL);
if (IS_ERR(hw)) {
ret = PTR_ERR(hw);
@@ -385,7 +386,8 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT] = hw;
hw = devm_clk_hw_register_fixed_factor(dev, "sai_pll_out_div2",
- "sai_pll_out", 0, 1, 2);
+ "sai_pll_out",
+ CLK_SET_RATE_PARENT, 1, 2);
if (IS_ERR(hw)) {
ret = PTR_ERR(hw);
goto err_clk_register;
--
2.34.1
next prev parent reply other threads:[~2024-06-14 7:59 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-14 7:41 [PATCH v8 0/5] clk: imx: clk-audiomix: Improvement for audiomix Shengjiu Wang
2024-06-14 7:41 ` [PATCH v8 1/5] dt-bindings: clock: imx8mp: Add #reset-cells property Shengjiu Wang
2024-06-14 7:42 ` [PATCH v8 2/5] clk: imx: clk-audiomix: Add reset controller Shengjiu Wang
2024-06-14 10:17 ` Marco Felsch
2024-06-14 7:42 ` [PATCH v8 3/5] reset: imx8mp-audiomix: Add AudioMix Block Control reset driver Shengjiu Wang
2024-06-21 10:59 ` Philipp Zabel
2024-06-21 12:34 ` Shengjiu Wang
2024-06-21 13:51 ` Philipp Zabel
2024-06-14 7:42 ` Shengjiu Wang [this message]
2024-06-14 7:42 ` [PATCH v8 5/5] clk: imx: clk-audiomix: Correct parent clock for earc_phy and audpll Shengjiu Wang
2024-06-21 6:26 ` [PATCH v8 0/5] clk: imx: clk-audiomix: Improvement for audiomix Abel Vesa
2024-06-21 6:36 ` Abel Vesa
2024-06-21 8:09 ` Shengjiu Wang
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