From: Richard Zhu <hongxing.zhu@nxp.com>
To: kw@linux.com, manivannan.sadhasivam@linaro.org,
bhelgaas@google.com, lpieralisi@kernel.org, frank.li@nxp.com,
l.stach@pengutronix.de, robh+dt@kernel.org, conor+dt@kernel.org,
shawnguo@kernel.org, krzysztof.kozlowski+dt@linaro.org,
festevam@gmail.com, s.hauer@pengutronix.de
Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
kernel@pengutronix.de, imx@lists.linux.dev
Subject: [PATCH v4 1/9] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe RC
Date: Tue, 15 Oct 2024 16:33:25 +0800 [thread overview]
Message-ID: <1728981213-8771-2-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1728981213-8771-1-git-send-email-hongxing.zhu@nxp.com>
Previous reference clock of i.MX95 PCIe RC is on when system boot to
kernel. But boot firmware change the behavor, it is off when boot. So it
needs be turn on when it is used. Also it needs be turn off/on when suspend
and resume.
Add one ref clock for i.MX95 PCIe RC. Increase clocks' maxItems to 5 and keep
the same restriction with other compatible string.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/pci/fsl,imx6q-pcie-common.yaml | 4 +--
.../bindings/pci/fsl,imx6q-pcie-ep.yaml | 1 +
.../bindings/pci/fsl,imx6q-pcie.yaml | 25 ++++++++++++++++---
3 files changed, 24 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
index a8b34f58f8f4..cddbe21f99f2 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
@@ -17,11 +17,11 @@ description:
properties:
clocks:
minItems: 3
- maxItems: 4
+ maxItems: 5
clock-names:
minItems: 3
- maxItems: 4
+ maxItems: 5
num-lanes:
const: 1
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
index 84ca12e8b25b..f41f704c6729 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
@@ -103,6 +103,7 @@ allOf:
properties:
clocks:
minItems: 4
+ maxItems: 4
clock-names:
items:
- const: pcie
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index 1e05c560d797..4c76cd3f98a9 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -40,10 +40,11 @@ properties:
- description: PCIe PHY clock.
- description: Additional required clock entry for imx6sx-pcie,
imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
+ - description: PCIe reference clock.
clock-names:
minItems: 3
- maxItems: 4
+ maxItems: 5
interrupts:
items:
@@ -127,7 +128,7 @@ allOf:
then:
properties:
clocks:
- minItems: 4
+ maxItems: 4
clock-names:
items:
- const: pcie
@@ -140,11 +141,10 @@ allOf:
compatible:
enum:
- fsl,imx8mq-pcie
- - fsl,imx95-pcie
then:
properties:
clocks:
- minItems: 4
+ maxItems: 4
clock-names:
items:
- const: pcie
@@ -200,6 +200,23 @@ allOf:
- const: mstr
- const: slv
+ - if:
+ properties:
+ compatible:
+ enum:
+ - fsl,imx95-pcie
+ then:
+ properties:
+ clocks:
+ maxItems: 5
+ clock-names:
+ items:
+ - const: pcie
+ - const: pcie_bus
+ - const: pcie_phy
+ - const: pcie_aux
+ - const: ref
+
unevaluatedProperties: false
examples:
--
2.37.1
next prev parent reply other threads:[~2024-10-15 8:57 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-15 8:33 [PATCH v4 0/9] A bunch of changes to refine i.MX PCIe driver Richard Zhu
2024-10-15 8:33 ` Richard Zhu [this message]
2024-10-18 23:13 ` [PATCH v4 1/9] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe RC Bjorn Helgaas
2024-10-21 15:26 ` Frank Li
2024-10-22 16:38 ` Manivannan Sadhasivam
2024-10-15 8:33 ` [PATCH v4 2/9] PCI: imx6: Add ref clock for i.MX95 PCIe Richard Zhu
2024-10-22 16:46 ` Manivannan Sadhasivam
2024-10-24 7:42 ` Hongxing Zhu
2024-10-15 8:33 ` [PATCH v4 3/9] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Richard Zhu
2024-10-22 16:48 ` Manivannan Sadhasivam
2024-10-22 19:56 ` Frank Li
2024-10-15 8:33 ` [PATCH v4 4/9] PCI: imx6: Correct controller_id generation logic for i.MX7D Richard Zhu
2024-10-22 16:55 ` Manivannan Sadhasivam
2024-10-24 7:42 ` Hongxing Zhu
2024-10-15 8:33 ` [PATCH v4 5/9] PCI: imx6: Make core reset assertion deassertion symmetric Richard Zhu
2024-10-22 16:59 ` Manivannan Sadhasivam
2024-10-15 8:33 ` [PATCH v4 6/9] PCI: imx6: Make *_enable_ref_clk() function symmetric Richard Zhu
2024-10-22 17:05 ` Manivannan Sadhasivam
2024-10-15 8:33 ` [PATCH v4 7/9] PCI: imx6: Use dwc common suspend resume method Richard Zhu
2024-10-22 17:18 ` Manivannan Sadhasivam
2024-10-22 19:42 ` Frank Li
2024-10-24 7:43 ` Hongxing Zhu
2024-10-15 8:33 ` [PATCH v4 8/9] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95 PCIe PM support Richard Zhu
2024-10-15 8:33 ` [PATCH v4 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Richard Zhu
2024-10-22 17:20 ` Manivannan Sadhasivam
2024-10-18 1:39 ` [PATCH v4 0/9] A bunch of changes to refine i.MX PCIe driver Hongxing Zhu
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