devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Richard Zhu <hongxing.zhu@nxp.com>
To: kw@linux.com, manivannan.sadhasivam@linaro.org,
	bhelgaas@google.com, lpieralisi@kernel.org, frank.li@nxp.com,
	l.stach@pengutronix.de, robh+dt@kernel.org, conor+dt@kernel.org,
	shawnguo@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	festevam@gmail.com, s.hauer@pengutronix.de
Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	kernel@pengutronix.de, imx@lists.linux.dev
Subject: [PATCH v4 2/9] PCI: imx6: Add ref clock for i.MX95 PCIe
Date: Tue, 15 Oct 2024 16:33:26 +0800	[thread overview]
Message-ID: <1728981213-8771-3-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1728981213-8771-1-git-send-email-hongxing.zhu@nxp.com>

Add "ref" clock to enable reference clock.

If use external clock, ref clock should point to external reference.

If use internal clock, CREF_EN in LAST_TO_REG controls reference output,
which implement in drivers/clk/imx/clk-imx95-blk-ctl.c.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 808d1f105417..52a8b2dc828a 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -1480,6 +1480,7 @@ static const char * const imx8mm_clks[] = {"pcie_bus", "pcie", "pcie_aux"};
 static const char * const imx8mq_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux"};
 static const char * const imx6sx_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_inbound_axi"};
 static const char * const imx8q_clks[] = {"mstr", "slv", "dbi"};
+static const char * const imx95_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux", "ref"};
 
 static const struct imx_pcie_drvdata drvdata[] = {
 	[IMX6Q] = {
@@ -1593,8 +1594,8 @@ static const struct imx_pcie_drvdata drvdata[] = {
 	[IMX95] = {
 		.variant = IMX95,
 		.flags = IMX_PCIE_FLAG_HAS_SERDES,
-		.clk_names = imx8mq_clks,
-		.clks_cnt = ARRAY_SIZE(imx8mq_clks),
+		.clk_names = imx95_clks,
+		.clks_cnt = ARRAY_SIZE(imx95_clks),
 		.ltssm_off = IMX95_PE0_GEN_CTRL_3,
 		.ltssm_mask = IMX95_PCIE_LTSSM_EN,
 		.mode_off[0]  = IMX95_PE0_GEN_CTRL_1,
-- 
2.37.1


  parent reply	other threads:[~2024-10-15  8:57 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-15  8:33 [PATCH v4 0/9] A bunch of changes to refine i.MX PCIe driver Richard Zhu
2024-10-15  8:33 ` [PATCH v4 1/9] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe RC Richard Zhu
2024-10-18 23:13   ` Bjorn Helgaas
2024-10-21 15:26     ` Frank Li
2024-10-22 16:38     ` Manivannan Sadhasivam
2024-10-15  8:33 ` Richard Zhu [this message]
2024-10-22 16:46   ` [PATCH v4 2/9] PCI: imx6: Add ref clock for i.MX95 PCIe Manivannan Sadhasivam
2024-10-24  7:42     ` Hongxing Zhu
2024-10-15  8:33 ` [PATCH v4 3/9] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Richard Zhu
2024-10-22 16:48   ` Manivannan Sadhasivam
2024-10-22 19:56     ` Frank Li
2024-10-15  8:33 ` [PATCH v4 4/9] PCI: imx6: Correct controller_id generation logic for i.MX7D Richard Zhu
2024-10-22 16:55   ` Manivannan Sadhasivam
2024-10-24  7:42     ` Hongxing Zhu
2024-10-15  8:33 ` [PATCH v4 5/9] PCI: imx6: Make core reset assertion deassertion symmetric Richard Zhu
2024-10-22 16:59   ` Manivannan Sadhasivam
2024-10-15  8:33 ` [PATCH v4 6/9] PCI: imx6: Make *_enable_ref_clk() function symmetric Richard Zhu
2024-10-22 17:05   ` Manivannan Sadhasivam
2024-10-15  8:33 ` [PATCH v4 7/9] PCI: imx6: Use dwc common suspend resume method Richard Zhu
2024-10-22 17:18   ` Manivannan Sadhasivam
2024-10-22 19:42     ` Frank Li
2024-10-24  7:43     ` Hongxing Zhu
2024-10-15  8:33 ` [PATCH v4 8/9] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95 PCIe PM support Richard Zhu
2024-10-15  8:33 ` [PATCH v4 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Richard Zhu
2024-10-22 17:20   ` Manivannan Sadhasivam
2024-10-18  1:39 ` [PATCH v4 0/9] A bunch of changes to refine i.MX PCIe driver Hongxing Zhu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1728981213-8771-3-git-send-email-hongxing.zhu@nxp.com \
    --to=hongxing.zhu@nxp.com \
    --cc=bhelgaas@google.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=festevam@gmail.com \
    --cc=frank.li@nxp.com \
    --cc=imx@lists.linux.dev \
    --cc=kernel@pengutronix.de \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=kw@linux.com \
    --cc=l.stach@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=robh+dt@kernel.org \
    --cc=s.hauer@pengutronix.de \
    --cc=shawnguo@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).