[PATCH 0/3] PCI: brcmstb: Add 74110a0 SoC configuration

Jim Quinlan
2025-07-03T21:53:20Z

This series enables a new SoC to run with the existing Brcm STB PCIe
driver. Previous chips all required that an inbound window have a size
that is a power of two; this chip, and next generations chips like it, can
have windows of any reasonable size.

Note: This series must follow the commits of two previous and pending
series [1,2].

[1] https://lore.kernel.org/linux-pci/20250613220843.698227-1-james.quinlan@broadcom.com/
[2] https://lore.kernel.org/linux-pci/20250609221710.10315-1-james.quinlan@broadcom.com/

Jim Quinlan (3):
dt-bindings: PCI: brcm,stb-pcie: Add 74110 SoC
PCI: brcmstb: Acommodate newer SOCs with next-gen PCIe inbound mapping
PCI: brcmstb: Add 74110a0 SoC configuration details

.../bindings/pci/brcm,stb-pcie.yaml | 1 +
drivers/pci/controller/pcie-brcmstb.c | 80 ++++++++++++++++++-
2 files changed, 80 insertions(+), 1 deletion(-)

base-commit: 17bbde2e1716e2ee4b997d476b48ae85c5a47671
prerequisite-patch-id: 82aa80f7ebaa1ee1d48b59bd7f1eb6b21db3c41d
prerequisite-patch-id: e7b6b6e618ee225c9f4892a6078e7b3c4f8b1c73
prerequisite-patch-id: 66cabe0efb02132ce7cf8a849b5bb7f19ab407a2
prerequisite-patch-id: 118fda1b363bc18ef0736f917d1dd5497699156e
prerequisite-patch-id: a48573e6eca090a032c0932ff89f26eae4162db8
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2.34.1