From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 168DE54F81; Fri, 25 Jul 2025 02:42:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753411325; cv=none; b=YnSYsgT7MNKlyAeebW7r+D71WELXNVe34YwDkFTgvBRTvy9VPdsLNumjyRRsdEqhjTd8Uf228NlC382OcebaUIRz1XBAIRZhg2VQxNW9m/GFjjpajyyCo+tUECZf7uIGy3nTjAKURZ7UoN+aFkM1wEfl3XuMYNYADOkdkPYepqU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753411325; c=relaxed/simple; bh=/Wzdxi+FPpqqrFYqJSRrwfVEvytWS2E7haaA0G+djCQ=; h=Content-Type:MIME-Version:In-Reply-To:References:Subject:From:Cc: To:Date:Message-ID; b=pLl8qMv0SX3aD4KC79S7bHbGJJ7X3G+Ujfm0wpM/dt4Lq9kk+ZxCbVU23iZ+I+HuVeFUAlZRvw5nOLwt7Pbk/J5nn+DFeLT+YU+LzKgnyPkYICEviPwL8FubZL3my3LU4WwA5W4t7m9aoUOr4l8nRpvbHVN0c1dQ9rOVWe3dTKs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Q05+ipRq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Q05+ipRq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5C483C4CEED; Fri, 25 Jul 2025 02:42:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1753411324; bh=/Wzdxi+FPpqqrFYqJSRrwfVEvytWS2E7haaA0G+djCQ=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=Q05+ipRqgOKM9ulQakC4Kame56xoZ1ktwQHG4p2XBCrUmptyrixMs8W8cOvssYCow SWBf+2skMIYvclwUtHY3/YFK/UX5AOCoBMWxcxUT+YeFIVQTbZIcuYEaoeKhX+kXrL 01haOR6mUd1yntkZX/f/zSjiuWUpVAGqlXdf/koCEXeNHG3VB7H29ygNRZyoj3sFUL A6KVg7mtkASoNgEZNnRSwB8hVkUFf27iIQS1H3cqfbmhKC0LqxQ4/cYT6MhfoLaXah SlU7/TNbf8Q1pyv3YMZU7dZscywJvpjvS2DtoFSV9jHEbJU+w9gbw7JY3uNfDhvqdY Uh5du55PTEkEQ== Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20250704070356.1683992-9-apatel@ventanamicro.com> References: <20250704070356.1683992-1-apatel@ventanamicro.com> <20250704070356.1683992-9-apatel@ventanamicro.com> Subject: Re: [PATCH v8 08/24] dt-bindings: clock: Add RPMI clock service message proxy bindings From: Stephen Boyd Cc: Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Len Brown , Sunil V L , Rahul Pathak , Leyfoon Tan , Atish Patra , Andrew Jones , Samuel Holland , Anup Patel , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel , Conor Dooley To: Andy Shevchenko , Anup Patel , Bartosz Golaszewski , Conor Dooley , Jassi Brar , Krzysztof Kozlowski , Linus Walleij , Michael Turquette , Mika Westerberg , Rafael J . Wysocki , Rob Herring , Thomas Gleixner , Uwe =?utf-8?q?Kleine-K=C3=B6nig?= Date: Thu, 24 Jul 2025 19:42:03 -0700 Message-ID: <175341132347.3513.7184287611040628050@lazor> User-Agent: alot/0.11 Quoting Anup Patel (2025-07-04 00:03:40) > Add device tree bindings for the RPMI clock service group based > message proxy implemented by the SBI implementation (machine mode > firmware or hypervisor). >=20 > The RPMI clock service group is defined by the RISC-V platform > management interface (RPMI) specification. >=20 > Reviewed-by: Conor Dooley > Signed-off-by: Anup Patel [...] > +additionalProperties: false > + > +examples: > + - | > + clock-controller { Maybe the name should be 'clock-service' then? I don't understand SBI so not sure why this is in DT to begin with. Is something consuming this node? Or a driver is binding to it? > + compatible =3D "riscv,rpmi-mpxy-clock"; > + mboxes =3D <&rpmi_shmem_mbox 0x8>; > + riscv,sbi-mpxy-channel-id =3D <0x1000>; > + };