* [PATCH v2] arm64: dts: qcom: sc7180: Describe on-SoC USB-adjacent data paths
@ 2025-08-12 10:48 Konrad Dybcio
2025-09-01 19:45 ` Bjorn Andersson
0 siblings, 1 reply; 2+ messages in thread
From: Konrad Dybcio @ 2025-08-12 10:48 UTC (permalink / raw)
To: cros-qcom-dts-watchers, Bjorn Andersson, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
USB connector bindings describe a ports subnode, which describes how
its High-/SuperSpeed data lines (as well as the SBU pins for Type-C)
are connected.
On Linux, skipping the graph results in the 'connect_type' sysfs
attribute returning 'unknown', instead of 'hotplug' or similar. This in
turn is parsed by some operating systems (such as CrOS), to e.g. make
security policy decisions.
Define ports {} for the DWC controller & the QMPPHY and connect them
together for the SS lanes.
Leave the DP endpoint unconnected for now, as both Aspire 1 and the
Chromebooks (unmerged, see [1]) seem to have a non-trivial topology.
Take the creative liberty to add a newline before its ports' subnodes
though.
[1] https://lore.kernel.org/linux-arm-msm/20240210070934.2549994-23-swboyd@chromium.org/
Suggested-by: Rob Herring (Arm) <robh@kernel.org>
Closes: https://lore.kernel.org/linux-arm-msm/175462129176.394940.16810637795278334342.robh@kernel.org/
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
Changes in v2:
- Tell the story of what this change is useful for
- Leave DP lines unconnected, IIUC Nikita will submit changes for the
Acer laptop separately after giving it a test (i.e. no code change)
- Link to v1: https://lore.kernel.org/r/20250808-topic-7180_qmpphy_ports-v1-1-718d7c52921a@oss.qualcomm.com
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 48 ++++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 8f827f1d8515d6113c85a2ecacf7ac364e195242..a0df10a97c7f8aa5cd468c8983e74256490d1d06 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2897,6 +2897,31 @@ usb_1_qmpphy: phy@88e8000 {
#clock-cells = <1>;
#phy-cells = <1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_qmpphy_out: endpoint { };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_qmpphy_usb_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ usb_1_qmpphy_dp_in: endpoint { };
+ };
+ };
};
pmu@90b6300 {
@@ -3070,6 +3095,26 @@ usb_1_dwc3: usb@a600000 {
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
maximum-speed = "super-speed";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_dwc3_hs: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
+ };
+ };
+ };
};
};
@@ -3384,8 +3429,10 @@ mdss_dp: displayport-controller@ae90000 {
ports {
#address-cells = <1>;
#size-cells = <0>;
+
port@0 {
reg = <0>;
+
dp_in: endpoint {
remote-endpoint = <&dpu_intf0_out>;
};
@@ -3393,6 +3440,7 @@ dp_in: endpoint {
port@1 {
reg = <1>;
+
mdss_dp_out: endpoint { };
};
};
---
base-commit: b1549501188cc9eba732c25b033df7a53ccc341f
change-id: 20250808-topic-7180_qmpphy_ports-e63404331685
Best regards,
--
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sc7180: Describe on-SoC USB-adjacent data paths
2025-08-12 10:48 [PATCH v2] arm64: dts: qcom: sc7180: Describe on-SoC USB-adjacent data paths Konrad Dybcio
@ 2025-09-01 19:45 ` Bjorn Andersson
0 siblings, 0 replies; 2+ messages in thread
From: Bjorn Andersson @ 2025-09-01 19:45 UTC (permalink / raw)
To: cros-qcom-dts-watchers, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Konrad Dybcio
Cc: Marijn Suijten, linux-arm-msm, devicetree, linux-kernel,
Konrad Dybcio
On Tue, 12 Aug 2025 12:48:15 +0200, Konrad Dybcio wrote:
> USB connector bindings describe a ports subnode, which describes how
> its High-/SuperSpeed data lines (as well as the SBU pins for Type-C)
> are connected.
>
> On Linux, skipping the graph results in the 'connect_type' sysfs
> attribute returning 'unknown', instead of 'hotplug' or similar. This in
> turn is parsed by some operating systems (such as CrOS), to e.g. make
> security policy decisions.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: sc7180: Describe on-SoC USB-adjacent data paths
commit: 3d7f446472cb0d9e0dbae0aa09f3647d5649c758
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
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