Re: [PATCH 5/6] dt-bindings: add documentation of rk3399 clock controller

[Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>]

Am Freitag, 19. Februar 2016, 08:48:15 schrieb Jianqun Xu:
> Hi Rob
> 
> 在 18/02/2016 22:36, Rob Herring 写道:
> > On Wed, Feb 17, 2016 at 09:54:49AM +0800, jianqun.xu wrote:
> >> From: Xing Zheng <zhengxing@rock-chips.com>
> >> 
> >> Add the devicetree binding for the cru on the rk3399 which quite
> >> similar structured as previous clock controllers.
> >> 
> >> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
> >> ---
> >> 
> >>   .../bindings/clock/rockchip,rk3399-cru.txt         | 82
> >>   ++++++++++++++++++++++ 1 file changed, 82 insertions(+)
> >>   create mode 100644
> >>   Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt>> 
> >> diff --git
> >> a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
> >> b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt new
> >> file mode 100644
> >> index 0000000..07bcc6e
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
> >> @@ -0,0 +1,82 @@
> >> +* Rockchip RK3399 Clock and Reset Unit
> > 
> > [...]
> > 
> >> +Example: General Register Files
> >> +
> >> +	pmugrf: syscon@ff320000 {
> >> +		compatible = "rockchip,rk3399-pmugrf", "syscon";
> > 
> > Is this documented?
> 
> Since there is no documentation for rockchip grf from early SoCs, I
> think if we need to add a new devicetree documentation, such as
> Documentation/devicetree/bindings/clock/rockchip,rk3399-grf.txt ?

The grf is not clock-specific, so the directory is probably not correct.
I'd think bindings/arm/rockchip/grf.txt might be better or
bindings/soc/rockchip/grf.txt or somewhere else. And define the properties 
for all per-soc GRFs in there.

In any case we really should add the missing grf binding documentation (in a 
separate patch of course), as the grf is a pretty commonly used shared 
component.


> 
> If you agree, I will add it in next patch
> 
> >> +		reg = <0x0 0xff320000 0x0 0x1000>;
> >> +	};
> >> +
> >> +	grf: syscon@ff770000 {
> >> +		compatible = "rockchip,rk3399-grf", "syscon";
> > 
> > ditto.
> > 
> >> +		reg = <0x0 0xff770000 0x0 0x10000>;
> >> +	};
> >> +
> >> +Example: Clock controller node:
> >> +
> >> +	pmucru: pmu-clock-controller@ff750000 {
> >> +		compatible = "rockchip,rk3399-pmucru";
> >> +		reg = <0x0 0xff750000 0x0 0x1000>;
> >> +		#clock-cells = <1>;
> >> +		#reset-cells = <1>;
> >> +	};
> >> +
> >> +	cru: clock-controller@ff760000 {
> >> +		compatible = "rockchip,rk3399-cru";
> >> +		reg = <0x0 0xff760000 0x0 0x1000>;
> >> +		rockchip,grf = <&grf>;
> >> +		#clock-cells = <1>;
> >> +		#reset-cells = <1>;
> >> +	};
> >> +
> >> +Example: UART controller node that consumes the clock generated by the
> >> clock +  controller:
> >> +
> >> +	uart0: serial@ff1a0000 {
> >> +		compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
> >> +		reg = <0x0 0xff180000 0x0 0x100>;
> >> +		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
> >> +		clock-names = "baudclk", "apb_pclk";
> >> +		interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
> >> +		reg-shift = <2>;
> >> +		reg-io-width = <4>;
> >> +	};
> >> --
> >> 1.9.1


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