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Fri, 13 Nov 2026 10:58:03 +0000 (GMT) Received: from epcpadp2new (unknown [182.195.40.142]) by epsnrtp02.localdomain (Postfix) with ESMTP id 4jQvP71MqKz2SSKX; Fri, 13 Nov 2026 10:58:03 +0000 (GMT) Received: from epsmtip2.samsung.com (unknown [182.195.34.31]) by epcas5p2.samsung.com (KnoxPortal) with ESMTPA id 20261113104841epcas5p2823126ce22f44cc98fcbdf94403c32e3~nlRtsfACF0610106101epcas5p2t; Fri, 13 Nov 2026 10:48:41 +0000 (GMT) Received: from bose.samsungds.net (unknown [107.108.83.9]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20261113104838epsmtip25ae1a5c48af7750b30108a09ab7d028b~nlRqwervP2503625036epsmtip2H; Fri, 13 Nov 2026 10:48:38 +0000 (GMT) From: Raghav Sharma To: krzk@kernel.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, peter.griffin@linaro.org, alim.akhtar@samsung.com, sboyd@kernel.org, bmasney+clk@redhat.com, jbrunet+clk@baylibre.com, robh@kernel.org, conor+dt@kernel.org, raghav.s@samsung.com Cc: linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, is.gandhi@samsung.com, ts.amit@samsung.com, pokala.reddy@samsung.com, Krzysztof Kozlowski Subject: [PATCH v3 04/14 RESEND] dt-bindings: clock: exynos8855: add hsi clock definitions Date: Fri, 13 Nov 2026 16:36:02 +0530 Message-Id: <1771243284.81794567483188.JavaMail.epsvc@epcpadp2new> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261113110612.3265841-1-raghav.s@samsung.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CMS-MailID: 20261113104841epcas5p2823126ce22f44cc98fcbdf94403c32e3 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P X-CPGSPASS: Y X-Hop-Count: 3 X-CMS-RootMailID: 20261113104841epcas5p2823126ce22f44cc98fcbdf94403c32e3 References: <20261113110612.3265841-1-raghav.s@samsung.com> Add device tree clock binding definitions for CMU_HSI Reviewed-by: Krzysztof Kozlowski Signed-off-by: Raghav Sharma --- .../clock/samsung,exynos8855-clock.yaml | 21 +++++++++++++++++++ .../dt-bindings/clock/samsung,exynos8855.h | 8 +++++++ 2 files changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml index 53fc8040e173..21928235d131 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml @@ -28,6 +28,7 @@ description: | properties: compatible: enum: + - samsung,exynos8855-cmu-hsi - samsung,exynos8855-cmu-peric - samsung,exynos8855-cmu-peris - samsung,exynos8855-cmu-top @@ -52,6 +53,26 @@ properties: Phandle to system registers interface. allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos8855-cmu-hsi + + then: + properties: + clocks: + items: + - description: External reference clock (76.8 MHz) + - description: CMU_HSI NOC clock (from CMU_TOP) + - description: CMU_HSI UFS_EMBD clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + - const: ufs_embd + - if: properties: compatible: diff --git a/include/dt-bindings/clock/samsung,exynos8855.h b/include/dt-bindings/clock/samsung,exynos8855.h index 5d8b38a744b5..67cd97d8fab8 100644 --- a/include/dt-bindings/clock/samsung,exynos8855.h +++ b/include/dt-bindings/clock/samsung,exynos8855.h @@ -214,4 +214,12 @@ #define CLK_GOUT_WDT0_PERIS 8 #define CLK_GOUT_WDT1_PERIS 9 +/* CMU_HSI */ +#define CLK_MOUT_HSI_NOC_USER 1 +#define CLK_MOUT_HSI_UFS_EMBD_USER 2 +#define CLK_GOUT_CMU_HSI 3 +#define CLK_GOUT_SYSREG_HSI 4 +#define CLK_GOUT_UFS_EMBD_ACLK_HSI 5 +#define CLK_GOUT_UFS_EMBD_UNIPRO_HSI 6 + #endif /* _DT_BINDINGS_CLOCK_EXYNOS8855_H */ -- 2.34.1