From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BFAB220F2D; Tue, 19 May 2026 14:09:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779199786; cv=none; b=e14DJXISjLPB1SIITR7SiFz4LJqGxI52PkzPdw6DzSatU66FH61seK/NEsNZ4c17wFVsEBY7KdtE5K09/DhfiqoJOXb2zDw3L7MKytlk6KSX5zBhhMWrRoLGJA9HoZ6R0RUtkMWqJ4PPDcbUExAS+lAnTuKX8w+p607E9atdRN0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779199786; c=relaxed/simple; bh=4Ltbq15kjfEzTysWd6z+gU1ilYXfFEJgzUN6Fba1Hds=; h=From:To:Cc:In-Reply-To:References:Subject:Message-Id:Date: MIME-Version:Content-Type; b=okLcfD4/Df7m1rMhdiM3h0zbR9LpP6g9U7E9AI+0LkULbu43YM9Fwa2DKF/QdIB/IlEIxEmSVqfZ7l+hUuphiF/lsGuVghhtEPvRZclPhKV39kWE7Lnf0qkU8gb9N5MlwCADIiETkc8MxrTtsfU1SySpFl86FeSDR9yuQubIFj0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mbDKO5Ff; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mbDKO5Ff" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 399DBC2BCB3; Tue, 19 May 2026 14:09:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1779199785; bh=4Ltbq15kjfEzTysWd6z+gU1ilYXfFEJgzUN6Fba1Hds=; h=From:To:Cc:In-Reply-To:References:Subject:Date:From; b=mbDKO5FfZ3jTbYMwIWc8ztlxKfbASRpLkX6sgeAn8/L/Yn+1cjwOFx0LeLuEruduQ C5Bq3OOKU6z3DS7XSvvZDMxrSvBho6MblvvjUNeQ6pHJRguNfu1NZP0ussBe06OqE/ 0q7PZD1xXZmXYU7jsxvDjsO4R+lDVWjIgYer5FmN6emQ/pl4si8QWuYK11ZQTkY90f e+cbLIVYmEj4g7rv1fPuP7GxyVRZSKMhMBXl4fFYS8yNULAtCkE2Y0Fi+3a+XikgXR F1CIweDppnDY5rIo43bGzlNAjgMAE4ggB/PmB2pX+uO8nE1I8/h7G51au8alZwo8QA LGNwQIF5XMoHg== From: Srinivas Kandagatla To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Pankaj Patil Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260331-glymur-qfprom-v1-0-5b4284d23c80@oss.qualcomm.com> References: <20260331-glymur-qfprom-v1-0-5b4284d23c80@oss.qualcomm.com> Subject: Re: (subset) [PATCH 0/2] arm64: dts: qcom: glymur: Add QFPROM efuse support Message-Id: <177919978388.21674.2828277188173354902.b4-ty@kernel.org> Date: Tue, 19 May 2026 15:09:43 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.14.3 On Tue, 31 Mar 2026 19:24:19 +0530, Pankaj Patil wrote: > Add dt-bindings and dt-node for Glymur QFPROM efuse. The GPU speed bin > child node nvmem cell contains details of clk frequencies supported by > the GPU, which is then read by the GPU driver to select the correct set > of operating performance points (OPPs) for the device > > Applied, thanks! [1/2] dt-bindings: nvmem: qfprom: Add glymur compatible commit: 79d6e37d56cf42006fbb999b425f8f7cc5bdeb61 Best regards, -- Srinivas Kandagatla