From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: horms@verge.net.au, linux-renesas-soc@vger.kernel.org,
robh+dt@kernel.org, mark.rutland@arm.com,
devicetree@vger.kernel.org
Cc: magnus.damm@gmail.com
Subject: [PATCH RFC 1/8] ARM: shmobile: r8a7743: add clock index macros
Date: Fri, 16 Sep 2016 16:28:48 +0300 [thread overview]
Message-ID: <17982632.cAVaBDUq2Q@wasted.cogentembedded.com> (raw)
In-Reply-To: <3533019.Wim1Kuh1ic@wasted.cogentembedded.com>
Add macros usable by the device tree sources to reference the R8A7743
clocks by index.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
include/dt-bindings/clock/r8a7743-clock.h | 157 ++++++++++++++++++++++++++++++
1 file changed, 157 insertions(+)
Index: renesas/include/dt-bindings/clock/r8a7743-clock.h
===================================================================
--- /dev/null
+++ renesas/include/dt-bindings/clock/r8a7743-clock.h
@@ -0,0 +1,157 @@
+/*
+ * Copyright 2013 Ideas On Board SPRL
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7743_H__
+#define __DT_BINDINGS_CLOCK_R8A7743_H__
+
+/* CPG */
+#define R8A7743_CLK_MAIN 0
+#define R8A7743_CLK_PLL0 1
+#define R8A7743_CLK_PLL1 2
+#define R8A7743_CLK_PLL3 3
+#define R8A7743_CLK_LB 4
+#define R8A7743_CLK_QSPI 5
+#define R8A7743_CLK_SDH 6
+#define R8A7743_CLK_SD0 7
+#define R8A7743_CLK_Z 8
+#define R8A7743_CLK_RCAN 9
+
+/* MSTP0 */
+#define R8A7743_CLK_MSIOF0 0
+
+/* MSTP1 */
+#define R8A7743_CLK_VCP0 1
+#define R8A7743_CLK_VPC0 3
+#define R8A7743_CLK_TMU1 11
+#define R8A7743_CLK_3DG 12
+#define R8A7743_CLK_2DDMAC 15
+#define R8A7743_CLK_FDP1_1 18
+#define R8A7743_CLK_FDP1_0 19
+#define R8A7743_CLK_TMU3 21
+#define R8A7743_CLK_TMU2 22
+#define R8A7743_CLK_CMT0 24
+#define R8A7743_CLK_TMU0 25
+#define R8A7743_CLK_VSP1_DU1 27
+#define R8A7743_CLK_VSP1_DU0 28
+#define R8A7743_CLK_VSP1_S 31
+
+/* MSTP2 */
+#define R8A7743_CLK_SCIFA2 2
+#define R8A7743_CLK_SCIFA1 3
+#define R8A7743_CLK_SCIFA0 4
+#define R8A7743_CLK_MSIOF2 5
+#define R8A7743_CLK_SCIFB0 6
+#define R8A7743_CLK_SCIFB1 7
+#define R8A7743_CLK_MSIOF1 8
+#define R8A7743_CLK_SCIFB2 16
+#define R8A7743_CLK_SYS_DMAC1 18
+#define R8A7743_CLK_SYS_DMAC0 19
+
+/* MSTP3 */
+#define R8A7743_CLK_TPU0 4
+#define R8A7743_CLK_SDHI2 11
+#define R8A7743_CLK_SDHI1 12
+#define R8A7743_CLK_SDHI0 14
+#define R8A7743_CLK_MMCIF0 15
+#define R8A7743_CLK_IIC0 18
+#define R8A7743_CLK_PCIEC 19
+#define R8A7743_CLK_IIC1 23
+#define R8A7743_CLK_SSUSB 28
+#define R8A7743_CLK_CMT1 29
+#define R8A7743_CLK_USBDMAC0 30
+#define R8A7743_CLK_USBDMAC1 31
+
+/* MSTP4 */
+#define R8A7743_CLK_IRQC 7
+
+/* MSTP5 */
+#define R8A7743_CLK_AUDIO_DMAC1 1
+#define R8A7743_CLK_AUDIO_DMAC0 2
+#define R8A7743_CLK_THERMAL 22
+#define R8A7743_CLK_PWM 23
+
+/* MSTP7 */
+#define R8A7743_CLK_EHCI 3
+#define R8A7743_CLK_HSUSB 4
+#define R8A7743_CLK_HSCIF2 13
+#define R8A7743_CLK_SCIF5 14
+#define R8A7743_CLK_SCIF4 15
+#define R8A7743_CLK_HSCIF1 16
+#define R8A7743_CLK_HSCIF0 17
+#define R8A7743_CLK_SCIF3 18
+#define R8A7743_CLK_SCIF2 19
+#define R8A7743_CLK_SCIF1 20
+#define R8A7743_CLK_SCIF0 21
+#define R8A7743_CLK_DU1 23
+#define R8A7743_CLK_DU0 24
+#define R8A7743_CLK_LVDS0 26
+
+/* MSTP8 */
+#define R8A7743_CLK_IPMMU_SGX 0
+#define R8A7743_CLK_VIN2 9
+#define R8A7743_CLK_VIN1 10
+#define R8A7743_CLK_VIN0 11
+#define R8A7743_CLK_ETHER 13
+#define R8A7743_CLK_SATA1 14
+#define R8A7743_CLK_SATA0 15
+
+/* MSTP9 */
+#define R8A7743_CLK_GPIO7 4
+#define R8A7743_CLK_GPIO6 5
+#define R8A7743_CLK_GPIO5 7
+#define R8A7743_CLK_GPIO4 8
+#define R8A7743_CLK_GPIO3 9
+#define R8A7743_CLK_GPIO2 10
+#define R8A7743_CLK_GPIO1 11
+#define R8A7743_CLK_GPIO0 12
+#define R8A7743_CLK_RCAN1 15
+#define R8A7743_CLK_RCAN0 16
+#define R8A7743_CLK_QSPI_MOD 17
+#define R8A7743_CLK_I2C5 25
+#define R8A7743_CLK_IICDVFS 26
+#define R8A7743_CLK_I2C4 27
+#define R8A7743_CLK_I2C3 28
+#define R8A7743_CLK_I2C2 29
+#define R8A7743_CLK_I2C1 30
+#define R8A7743_CLK_I2C0 31
+
+/* MSTP10 */
+#define R8A7743_CLK_SSI_ALL 5
+#define R8A7743_CLK_SSI9 6
+#define R8A7743_CLK_SSI8 7
+#define R8A7743_CLK_SSI7 8
+#define R8A7743_CLK_SSI6 9
+#define R8A7743_CLK_SSI5 10
+#define R8A7743_CLK_SSI4 11
+#define R8A7743_CLK_SSI3 12
+#define R8A7743_CLK_SSI2 13
+#define R8A7743_CLK_SSI1 14
+#define R8A7743_CLK_SSI0 15
+#define R8A7743_CLK_SCU_ALL 17
+#define R8A7743_CLK_SCU_DVC1 18
+#define R8A7743_CLK_SCU_DVC0 19
+#define R8A7743_CLK_SCU_CTU1_MIX1 20
+#define R8A7743_CLK_SCU_CTU0_MIX0 21
+#define R8A7743_CLK_SCU_SRC9 22
+#define R8A7743_CLK_SCU_SRC8 23
+#define R8A7743_CLK_SCU_SRC7 24
+#define R8A7743_CLK_SCU_SRC6 25
+#define R8A7743_CLK_SCU_SRC5 26
+#define R8A7743_CLK_SCU_SRC4 27
+#define R8A7743_CLK_SCU_SRC3 28
+#define R8A7743_CLK_SCU_SRC2 29
+#define R8A7743_CLK_SCU_SRC1 30
+#define R8A7743_CLK_SCU_SRC0 31
+
+/* MSTP11 */
+#define R8A7743_CLK_SCIFA3 6
+#define R8A7743_CLK_SCIFA4 7
+#define R8A7743_CLK_SCIFA5 8
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7743_H__ */
next prev parent reply other threads:[~2016-09-16 13:28 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-16 13:26 [PATCH RFC 0/8] Add R8A7743/SK-RZG1M board support Sergei Shtylyov
2016-09-16 13:28 ` Sergei Shtylyov [this message]
2016-09-17 10:15 ` [PATCH RFC 1/8] ARM: shmobile: r8a7743: add clock index macros Sergei Shtylyov
[not found] ` <3533019.Wim1Kuh1ic-gHKXc3Y1Z8zGSmamagVegGFoWSdPRAKMAL8bYrjMMd8@public.gmane.org>
2016-09-16 13:29 ` [PATCH RFC 2/8] ARM: shmobile: r8a7743: add power domain " Sergei Shtylyov
[not found] ` <2361310.TQ5AHhpEmD-gHKXc3Y1Z8zGSmamagVegGFoWSdPRAKMAL8bYrjMMd8@public.gmane.org>
2016-09-19 7:46 ` Geert Uytterhoeven
2016-09-16 13:37 ` [PATCH RFC 7/8] ARM: dts: r8a7743: add [H]SCIF support Sergei Shtylyov
2016-09-19 8:32 ` Geert Uytterhoeven
2016-09-16 13:35 ` [PATCH RFC 5/8] ARM: dts: r8a7743: initial SoC device tree Sergei Shtylyov
2016-09-19 8:14 ` Geert Uytterhoeven
2016-09-16 13:36 ` [PATCH RFC 6/8] ARM: dts: r8a7743: add SYS-DMAC support Sergei Shtylyov
2016-09-19 8:18 ` Geert Uytterhoeven
2016-09-19 8:19 ` Geert Uytterhoeven
2016-09-28 20:09 ` Sergei Shtylyov
[not found] ` <be7575a5-e9a0-05a6-5b2d-803632c7edac-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2016-09-29 6:36 ` Geert Uytterhoeven
2016-09-16 13:38 ` [PATCH RFC 8/8] ARM: dts: sk-rzg1m: initial device tree Sergei Shtylyov
2016-09-19 8:42 ` Geert Uytterhoeven
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