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From: "Andy Yan" <andyshrk@163.com>
To: "Dmitry Baryshkov" <dmitry.baryshkov@linaro.org>
Cc: heiko@sntech.de, hjc@rock-chips.com, mripard@kernel.org,
	cristian.ciocaltea@collabora.com, neil.armstrong@linaro.org,
	yubing.zhang@rock-chips.com, krzk+dt@kernel.org,
	devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	robh@kernel.org, sebastian.reichel@collabora.com,
	"Andy Yan" <andy.yan@rock-chips.com>
Subject: Re:Re: [PATCH 2/6] drm/bridge: synopsys: Add DW DPTX Controller support library
Date: Tue, 4 Mar 2025 18:16:19 +0800 (CST)	[thread overview]
Message-ID: <17a6bdcc.a22e.19560a80576.Coremail.andyshrk@163.com> (raw)
In-Reply-To: <5g6qv47ufjfy4yvzpw3rw7xopyuikzi7k4n2habxoexor4kyb2@f7pwawo75kqu>

Hi Dmitry,

在 2025-03-03 00:21:06,"Dmitry Baryshkov" <dmitry.baryshkov@linaro.org> 写道:
>On Sun, Mar 02, 2025 at 06:34:22PM +0800, Andy Yan wrote:
>> 
>> 
>> Hi Dmitry,
>>    Thank you for your review。
>>    Please also review my inline reply.
>>       
>> 在 2025-03-02 02:14:19,"Dmitry Baryshkov" <dmitry.baryshkov@linaro.org> 写道:
>> >On Sun, Feb 23, 2025 at 07:30:25PM +0800, Andy Yan wrote:
>> >> From: Andy Yan <andy.yan@rock-chips.com>
>> >> 
>> >> The DW DP TX Controller is compliant with the DisplayPort Specification
>> >> Version 1.4 with the following features:
>> >> 
>> >> * DisplayPort 1.4a
>> >> * Main Link: 1/2/4 lanes
>> >> * Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps
>> >> * AUX channel 1Mbps
>> >> * Single Stream Transport(SST)
>> >> * Multistream Transport (MST)
>> >> *Type-C support (alternate mode)
>> >> * HDCP 2.2, HDCP 1.3
>> >> * Supports up to 8/10 bits per color component
>> >> * Supports RBG, YCbCr4:4:4, YCbCr4:2:2, YCbCr4:2:0
>> >> * Pixel clock up to 594MHz
>> >> * I2S, SPDIF audio interface
>> >> 
>> >> Add library with common helpers to make it can be shared with
>> >> other SoC.
>> >> 
>> >> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
>> >> 
>> >> drm/bridge: cleanup
>> >
>> >Stray line?
>> 
>> Sorry, will be removed.
>> 
>> >
>> >> 
>> >> ---
>> >> 
>> >>  drivers/gpu/drm/bridge/synopsys/Kconfig  |    7 +
>> >>  drivers/gpu/drm/bridge/synopsys/Makefile |    1 +
>> >>  drivers/gpu/drm/bridge/synopsys/dw-dp.c  | 2155 ++++++++++++++++++++++
>> >>  include/drm/bridge/dw_dp.h               |   19 +
>> >>  4 files changed, 2182 insertions(+)
>> >>  create mode 100644 drivers/gpu/drm/bridge/synopsys/dw-dp.c
>> >>  create mode 100644 include/drm/bridge/dw_dp.h
>> >> 
>> >> diff --git a/drivers/gpu/drm/bridge/synopsys/Kconfig b/drivers/gpu/drm/bridge/synopsys/Kconfig
>> >> index f3ab2f985f8c..2c5e532410de 100644
>> >> --- a/drivers/gpu/drm/bridge/synopsys/Kconfig
>> >> +++ b/drivers/gpu/drm/bridge/synopsys/Kconfig
>> >> @@ -1,4 +1,11 @@
>> >>  # SPDX-License-Identifier: GPL-2.0-only
>> >> +config DRM_DW_DP
>> >> +	tristate
>> >> +	select DRM_DISPLAY_HELPER
>> >> +	select DRM_DISPLAY_DP_HELPER
>> >> +	select DRM_KMS_HELPER
>> >> +	select REGMAP_MMIO
>> >> +
>> >>  config DRM_DW_HDMI


..............

>> >> +		vsc.pixelformat = DP_PIXELFORMAT_RGB;
>> >> +		break;
>> >> +	}
>> >> +
>> >> +	if (video->color_format == DRM_COLOR_FORMAT_RGB444) {
>> >> +		vsc.colorimetry = DP_COLORIMETRY_DEFAULT;
>> >> +		vsc.dynamic_range = DP_DYNAMIC_RANGE_VESA;
>> >> +	} else {
>> >> +		vsc.colorimetry = DP_COLORIMETRY_BT709_YCC;
>> >> +		vsc.dynamic_range = DP_DYNAMIC_RANGE_CTA;
>> >> +	}
>> >> +
>> >> +	vsc.bpc = video->bpc;
>> >> +	vsc.content_type = DP_CONTENT_TYPE_NOT_DEFINED;
>> >> +
>> >> +	dw_dp_vsc_sdp_pack(&vsc, &sdp);
>> >> +
>> >> +	return dw_dp_send_sdp(dp, &sdp);
>> >> +}
>> >> +
>> >> +static int dw_dp_video_set_pixel_mode(struct dw_dp *dp, u8 pixel_mode)
>> >> +{
>> >> +	switch (pixel_mode) {
>> >> +	case DW_DP_MP_SINGLE_PIXEL:
>> >> +	case DW_DP_MP_DUAL_PIXEL:
>> >> +	case DW_DP_MP_QUAD_PIXEL:
>> >> +		break;
>> >> +	default:
>> >> +		return -EINVAL;
>> >
>> >Is it possible?
>> 
>> This IP is configurable for single/dual/quad pixel modes。
>> It's  quad pixel mode on rk3588 and dual pixel mode on rk3576,
>> so we add this check here.
>
>My question was slightly different: is it possible to end up here in the
>'default' branch?

Sorry, I think I didn't get your key point here.
If someone gives an invalid pixel mode(not any of SINGLE/DUAL/QUAD_PIXEL ), 
then we go to the default branch return -ENVIAL,  then the dp_bridge_enable  call stop.
This is what we want here.

>
>> 
>> 
>> >
>> >> +	}

>> >> +#endif /* __DW_DP__ */
>> >> -- 
>> >> 2.34.1
>> >> 
>> >
>> >-- 
>> >With best wishes
>> >Dmitry
>
>-- 
>With best wishes
>Dmitry

  parent reply	other threads:[~2025-03-04 10:17 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-23 11:30 [PATCH 0/6] Add support for RK3588 DisplayPort Controller Andy Yan
2025-02-23 11:30 ` [PATCH 1/6] dt-bindings: display: rockchip: Add schema for RK3588 DPTX Controller Andy Yan
2025-02-24 20:03   ` Rob Herring
2025-02-23 11:30 ` [PATCH 2/6] drm/bridge: synopsys: Add DW DPTX Controller support library Andy Yan
2025-03-01 18:14   ` Dmitry Baryshkov
2025-03-02 10:34     ` Andy Yan
2025-03-02 16:21       ` Dmitry Baryshkov
2025-03-04  7:16         ` Andy Yan
2025-03-04  9:18           ` Dmitry Baryshkov
2025-03-04 10:16         ` Andy Yan [this message]
2025-03-03  8:59     ` Yubing Zhang
2025-03-03  8:59       ` Yubing Zhang
2025-03-03 12:57       ` Dmitry Baryshkov
2025-03-09  6:51   ` FUKAUMI Naoki
2025-02-23 11:30 ` [PATCH 3/6] drm/rockchip: Add RK3588 DPTX output support Andy Yan
2025-02-24 14:56   ` kernel test robot
2025-03-01 18:19   ` Dmitry Baryshkov
2025-03-02 10:37     ` Andy Yan
2025-02-23 11:30 ` [PATCH 4/6] arm64: dts: rockchip: Add DP0 for rk3588 Andy Yan
2025-02-23 11:30 ` [PATCH 5/6] arm64: dts: rockchip: Add DP1 " Andy Yan
2025-02-23 11:30 ` [PATCH 6/6] arm64: dts: rockchip: Enable DisplayPort for rk3588s Cool Pi 4B Andy Yan
2025-03-09  6:35   ` FUKAUMI Naoki
2025-02-28 20:30 ` [PATCH 0/6] Add support for RK3588 DisplayPort Controller Piotr Oniszczuk
2025-03-01 12:24   ` Andy Yan
2025-03-04 13:12     ` Piotr Oniszczuk

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