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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id l9-20020ac25549000000b004f63739e2f1sm2559845lfk.255.2023.06.15.05.56.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Jun 2023 05:56:51 -0700 (PDT) Message-ID: <18103637-c191-9b8f-7983-d0b1591f9024@linaro.org> Date: Thu, 15 Jun 2023 14:56:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH v2 19/23] arm64: dts: qcom: sa8775p: add the SGMII PHY node Content-Language: en-US To: Bartosz Golaszewski , Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski References: <20230615121419.175862-1-brgl@bgdev.pl> <20230615121419.175862-20-brgl@bgdev.pl> From: Konrad Dybcio In-Reply-To: <20230615121419.175862-20-brgl@bgdev.pl> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 15.06.2023 14:14, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski > > Add the internal SGMII/SerDes PHY node for sa8775p platforms. > > Signed-off-by: Bartosz Golaszewski > --- Reviewed-by: Konrad Dybcio Konrad > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index b130136acffe..b6d95813c98c 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -1837,6 +1837,15 @@ adreno_smmu: iommu@3da0000 { > ; > }; > > + serdes0: phy@8901000 { > + compatible = "qcom,sa8775p-dwmac-sgmii-phy"; > + reg = <0x0 0x08901000 0x0 0xe10>; > + clocks = <&gcc GCC_SGMI_CLKREF_EN>; > + clock-names = "sgmi_ref"; > + #phy-cells = <0>; > + status = "disabled"; > + }; > + > pdc: interrupt-controller@b220000 { > compatible = "qcom,sa8775p-pdc", "qcom,pdc"; > reg = <0x0 0x0b220000 0x0 0x30000>,