From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH v6 2/2] clocksource: add J-Core timer/clocksource driver Date: Thu, 25 Aug 2016 12:23:48 +0200 Message-ID: <1815946.6MSqSqog7A@wuerfel> References: <20160824214444.GZ15995@brightrain.aerifal.cx> <3621664.0azN3a5cxy@wuerfel> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: <3621664.0azN3a5cxy@wuerfel> Sender: linux-kernel-owner@vger.kernel.org To: Rich Felker Cc: Mark Rutland , Daniel Lezcano , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org, Rob Herring , Thomas Gleixner , Marc Zyngier List-Id: devicetree@vger.kernel.org On Wednesday, August 24, 2016 11:57:08 PM CEST Arnd Bergmann wrote: > > I'm not familiar with those classifications, but from what I can tell, > > BE32 describes it correctly. I'll see if I can get someone to verify > > this. Is there a reason it's not widely used anymore? Perhaps > > something related to supporting misaligned word-sized loads/stores? > > The main problem I see is that you can't easily use MMIO registers that > are not 32-bit wide -- you end up having to flip not just the register > contents but also the lower bits of the address in order to reach > the right contents of the register. > Actually there is a much more serious problem with BE32/LE32 mode: doing unaligned access to RAM is a huge pain at the HW level, and also when emulating it in the kernel on CPUs that require aligned access. In ARM THUMB2 mode, you can even have unaligned 32-bit instructions. Arnd