From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F04E2C433DF for ; Fri, 9 Oct 2020 13:57:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B4EFC222B9 for ; Fri, 9 Oct 2020 13:57:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730552AbgJIN5O (ORCPT ); Fri, 9 Oct 2020 09:57:14 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:46214 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726211AbgJIN5N (ORCPT ); Fri, 9 Oct 2020 09:57:13 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id B941B29DE7B Subject: Re: [PATCH 00/12] soc: mediatek: pm-domains: Add new driver for SCPSYS power domains controller To: Matthias Brugger , Weiyi Lu Cc: devicetree@vger.kernel.org, drinkcat@chromium.org, linux-kernel@vger.kernel.org, fparent@baylibre.com, Rob Herring , linux-mediatek@lists.infradead.org, hsinyi@chromium.org, Collabora Kernel ML , linux-arm-kernel@lists.infradead.org References: <20200910172826.3074357-1-enric.balletbo@collabora.com> <1601028361.1346.38.camel@mtksdaap41> <19678952-e354-2067-e619-ffac28b347be@gmail.com> <1601967207.8638.4.camel@mtksdaap41> From: Enric Balletbo i Serra Message-ID: <181df5c6-9046-5273-879b-ed0d1a59c8b3@collabora.com> Date: Fri, 9 Oct 2020 15:57:08 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, On 9/10/20 14:50, Matthias Brugger wrote: > > > On 06/10/2020 08:53, Weiyi Lu wrote: >> On Fri, 2020-09-25 at 16:04 +0200, Matthias Brugger wrote: >>> >>> On 25/09/2020 12:06, Weiyi Lu wrote: >>>> On Thu, 2020-09-10 at 19:28 +0200, Enric Balletbo i Serra wrote: >>>>> Dear all, >>>>> >>>>> This is a new driver with the aim to deprecate the mtk-scpsys driver. >>>>> The problem with that driver is that, in order to support more Mediatek >>>>> SoCs you need to add some logic to handle properly the power-up >>>>> sequence of newer Mediatek SoCs, doesn't handle parent-child power >>>>> domains and need to hardcode all the clocks in the driver itself. The >>>>> result is that the driver is getting bigger and bigger every time a >>>>> new SoC needs to be supported. >>>>> >>>> >>>> Hi Enric and Matthias, >>>> >>>> First of all, thank you for the patch. But I'm worried the problem you >>>> mentioned won't be solved even if we work on this new driver in the >>>> future. My work on the MT8183 scpsys(now v17) is to implement the new >>>> hardware logic. Here, I also see related patches, which means that these >>>> new logics are necessary. Why can't we work on the original driver? >>> >>> Well the decision was to change the driver in a not compatible way to make >>> device tree entries better. If we work on the old driver, we would need to find >>> some creative ways to handle old bindings vs new bindings. >>> >>> So I thought it would be better doing a fresh start implementing mt1873 support >>> for reference and add mt8183 as new SoC. From what I have seen mt8192 and others >>> fit the driver structure too. >>> >>>> Meanwhile, I thought maybe we should separate the driver into general >>>> control and platform data for each SoC, otherwise it'll keep getting >>>> bigger and bigger if it need to be support new SoC. >>>> >>> >>> We could in a later series split the SoC depended data structures and put them >>> in drivers/soc/mediatek/pm-domains-mt8183.h or something like this. Is that what >>> you mean? >>> >> >> Yes, that is what I want. And I guess it could avoid the collisions in >> the different defines to the control registers and power status bits you >> mentioned. Hope this will happen in this series. >> > > Sounds good to me. Enric could you move the soc specific data to separate > include files? > Sure, I'll do this in v4. Thanks, Enric > Regards, > Matthias >