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From: Mikko Perttunen <mperttunen@nvidia.com>
To: Svyatoslav Ryhel <clamor95@gmail.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Thierry Reding <treding@nvidia.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Krzysztof Kozlowski <krzk@kernel.org>
Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v4 1/4] dt-bindings: reset: add Tegra114 car header
Date: Thu, 28 Aug 2025 16:50:03 +0900	[thread overview]
Message-ID: <1865189.3VsfAaAtOV@senjougahara> (raw)
In-Reply-To: <53b596e5-42da-418c-addf-d53fd12c528c@kernel.org>

On Thursday, August 28, 2025 4:19 PM Krzysztof Kozlowski wrote:
> On 28/08/2025 07:44, Svyatoslav Ryhel wrote:
> > The way that resets are handled on these Tegra devices is that there is a
> > set of peripheral clocks & resets which are paired up. This is because
> > they
> > are laid out in banks within the CAR (clock and reset) controller. In most
> > cases we're referring to those resets, so you'll often see a clock ID used
> > in conjection with the same reset ID for a given IP block.
> > 
> > In addition to those peripheral resets, there are a number of extra resets
> > that don't have a corresponding clock and which are exposed in registers
> > outside of the peripheral banks, but still part of the CAR. To support
> > those "special" registers, the TEGRA*_RESET() is used to denote resets
> > outside of the regular peripheral resets. Essentially it defines the
> > offset
> > within the CAR at which special resets start. In the above case, Tegra114
> > has 5 banks with 32 peripheral resets each. The first special reset,
> > TEGRA114_RESET(0), therefore gets ID 5 * 32 + 0 = 160.
> > 
> > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> > Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
> > ---
> > 
> >  include/dt-bindings/reset/tegra114-car.h | 13 +++++++++++++
> >  1 file changed, 13 insertions(+)
> >  create mode 100644 include/dt-bindings/reset/tegra114-car.h
> > 
> > diff --git a/include/dt-bindings/reset/tegra114-car.h
> > b/include/dt-bindings/reset/tegra114-car.h new file mode 100644
> > index 000000000000..d7908d810ddf
> > --- /dev/null
> > +++ b/include/dt-bindings/reset/tegra114-car.h
> 
> Still incorrectly named. Use full compatible, just like the other file
> where we already switched to recommended format (see also writing bindings).
> 
> I asked for this at v1 and then reminded about unresolved comments at v3.
> 

Ah, I guess you mean using 'nvidia,tegra114-car.h'? At least I hadn't realized 
practice had changed to include the vendor prefix.

It can be said that 'tegra114-car.h' is also based on the compatible, so I 
hadn't quite understood the original comment.

Mikko

> 
> Best regards,
> Krzysztof





  reply	other threads:[~2025-08-28  7:50 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-28  5:43 [PATCH v4 0/4] clk: tegra: add DFLL support for Tegra114 Svyatoslav Ryhel
2025-08-28  5:44 ` [PATCH v4 1/4] dt-bindings: reset: add Tegra114 car header Svyatoslav Ryhel
2025-08-28  7:19   ` Krzysztof Kozlowski
2025-08-28  7:50     ` Mikko Perttunen [this message]
2025-08-29  7:29       ` Krzysztof Kozlowski
2025-08-28  5:44 ` [PATCH v4 2/4] clk: tegra: add DFLL DVCO reset control for Tegra114 Svyatoslav Ryhel
2025-08-28  5:44 ` [PATCH v4 3/4] clk: tegra: dfll: add CVB tables " Svyatoslav Ryhel
2025-08-28  5:44 ` [PATCH v4 4/4] ARM: tegra: Add DFLL clock support " Svyatoslav Ryhel
2025-08-28 14:26 ` [PATCH v4 0/4] clk: tegra: add DFLL " Rob Herring (Arm)

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