From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Jiucheng Xu <jiucheng.xu@amlogic.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Chris Healy <cphealy@gmail.com>,
	kernel test robot <lkp@intel.com>
Subject: Re: [PATCH v5 1/4] perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver
Date: Thu, 18 Aug 2022 11:30:20 +0300	[thread overview]
Message-ID: <188425fd-8cc7-fb2e-9ee3-ff37937cac54@linaro.org> (raw)
In-Reply-To: <20220817113423.2088581-1-jiucheng.xu@amlogic.com>
On 17/08/2022 14:34, Jiucheng Xu wrote:
> This patch adds support Amlogic meson G12 series SoC
> DDR bandwidth PMU driver framework and interfaces.
> 
> The PMU not only can monitor the total DDR bandwidth,
> but also the bandwidth which is from individual IP module.
> 
> Example usage:
Thank you for your patch. There is something to discuss/improve.
}
> +
> +static int dmc_g12_irq_handler(struct dmc_info *info,
> +			       struct dmc_counter *counter)
> +{
> +	unsigned int val;
> +	int ret = -EINVAL;
> +
> +	val = readl(info->ddr_reg[0] + DMC_MON_G12_CTRL0);
> +	if (val & DMC_QOS_IRQ) {
> +		dmc_g12_get_counters(info, counter);
> +		/* clear irq flags */
> +		writel(val, info->ddr_reg[0] + DMC_MON_G12_CTRL0);
> +		ret = 0;
> +	}
> +	return ret;
> +}
> +
> +static struct dmc_hw_info g12a_dmc_info = {
This and other ones should be also const.
> +	.enable		= dmc_g12_counter_enable,
> +	.disable	= dmc_g12_counter_disable,
> +	.irq_handler	= dmc_g12_irq_handler,
> +	.get_counters	= dmc_g12_get_counters,
> +	.set_axi_filter	= dmc_g12_set_axi_filter,
> +
> +	.dmc_nr = 1,
> +	.chann_nr = 4,
> +	.capability = 0X7EFF00FF03DF,
> +	.fmt_attr = g12_pmu_format_attrs,
> +};
> +
Best regards,
Krzysztof
     prev parent reply	other threads:[~2022-08-18  8:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-17 11:34 [PATCH v5 1/4] perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver Jiucheng Xu
2022-08-17 11:34 ` [PATCH v5 2/4] docs/perf: Add documentation for the Amlogic G12 DDR PMU Jiucheng Xu
2022-08-17 11:34 ` [PATCH v5 3/4] dt-binding: perf: Add Amlogic " Jiucheng Xu
2022-08-18  8:25   ` Krzysztof Kozlowski
2022-08-19 13:44     ` Jiucheng Xu
2022-08-19 13:56       ` Krzysztof Kozlowski
2022-08-17 11:34 ` [PATCH v5 4/4] arm64: dts: meson: Add DDR PMU node Jiucheng Xu
2022-08-18  8:30 ` Krzysztof Kozlowski [this message]
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