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[2001:14bb:ae:539c:53ab:2635:d4f2:d6d5]) by smtp.gmail.com with ESMTPSA id q129-20020a2e5c87000000b002618e5c2664sm125538ljb.103.2022.08.18.01.30.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 18 Aug 2022 01:30:22 -0700 (PDT) Message-ID: <188425fd-8cc7-fb2e-9ee3-ff37937cac54@linaro.org> Date: Thu, 18 Aug 2022 11:30:20 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 Subject: Re: [PATCH v5 1/4] perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver Content-Language: en-US To: Jiucheng Xu , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Will Deacon , Mark Rutland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Chris Healy , kernel test robot References: <20220817113423.2088581-1-jiucheng.xu@amlogic.com> From: Krzysztof Kozlowski In-Reply-To: <20220817113423.2088581-1-jiucheng.xu@amlogic.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 17/08/2022 14:34, Jiucheng Xu wrote: > This patch adds support Amlogic meson G12 series SoC > DDR bandwidth PMU driver framework and interfaces. > > The PMU not only can monitor the total DDR bandwidth, > but also the bandwidth which is from individual IP module. > > Example usage: Thank you for your patch. There is something to discuss/improve. } > + > +static int dmc_g12_irq_handler(struct dmc_info *info, > + struct dmc_counter *counter) > +{ > + unsigned int val; > + int ret = -EINVAL; > + > + val = readl(info->ddr_reg[0] + DMC_MON_G12_CTRL0); > + if (val & DMC_QOS_IRQ) { > + dmc_g12_get_counters(info, counter); > + /* clear irq flags */ > + writel(val, info->ddr_reg[0] + DMC_MON_G12_CTRL0); > + ret = 0; > + } > + return ret; > +} > + > +static struct dmc_hw_info g12a_dmc_info = { This and other ones should be also const. > + .enable = dmc_g12_counter_enable, > + .disable = dmc_g12_counter_disable, > + .irq_handler = dmc_g12_irq_handler, > + .get_counters = dmc_g12_get_counters, > + .set_axi_filter = dmc_g12_set_axi_filter, > + > + .dmc_nr = 1, > + .chann_nr = 4, > + .capability = 0X7EFF00FF03DF, > + .fmt_attr = g12_pmu_format_attrs, > +}; > + Best regards, Krzysztof