From: rajpat@codeaurora.org
To: Doug Anderson <dianders@chromium.org>
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
msavaliy@qti.qualcomm.com, satya priya <skakit@codeaurora.org>,
Stephen Boyd <sboyd@kernel.org>,
Matthias Kaehlcke <mka@chromium.org>,
Roja Rani Yarubandi <rojay@codeaurora.org>
Subject: Re: [PATCH V7 1/7] arm64: dts: sc7280: Add QSPI node
Date: Thu, 16 Sep 2021 10:01:34 +0530 [thread overview]
Message-ID: <188e0a1f45336cc56ac2abb98d53dbde@codeaurora.org> (raw)
In-Reply-To: <CAD=FV=XjjNx5UzgiKvONw+n0waGqgF+g7Qf4su9dvPQRS7uCrw@mail.gmail.com>
On 2021-09-03 21:58, Doug Anderson wrote:
> Hi,
>
> On Thu, Sep 2, 2021 at 9:29 PM Rajesh Patil <rajpat@codeaurora.org>
> wrote:
>>
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -415,6 +415,25 @@
>> method = "smc";
>> };
>>
>> + qspi_opp_table: qspi-opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + opp-75000000 {
>> + opp-hz = /bits/ 64 <75000000>;
>> + required-opps = <&rpmhpd_opp_low_svs>;
>> + };
>> +
>> + opp-150000000 {
>> + opp-hz = /bits/ 64 <150000000>;
>> + required-opps = <&rpmhpd_opp_svs>;
>> + };
>> +
>
> Any chance you could add a 200 MHz OPP point? It seems plausible that
> we might want to run the Quad SPI bus at 50 MHz and this OPP needs to
> be 4x that, so 200 MHz. ...or does it magically handle that case by
> one of the other OPPs?
Okay
>
>> + opp-300000000 {
>> + opp-hz = /bits/ 64 <300000000>;
>> + required-opps = <&rpmhpd_opp_nom>;
>> + };
>> + };
>> +
>> soc: soc@0 {
>> #address-cells = <2>;
>> #size-cells = <2>;
>> @@ -1318,6 +1337,23 @@
>> };
>> };
>>
>> + qspi: spi@88dc000 {
>> + compatible = "qcom,qspi-v1";
>
> The above compatible should be:
>
> compatible = "qcom,sdm7280-qspi", "qcom,qspi-v1";
>
> ...and you should fix the devicetree bindings to handle that. You
> should also fix sc7180.
>
> Technically the "qcom,sdm7280-qspi" isn't really needed to make
> anything work today but having it is encouraged so that if we need to
> deal with a quirk in the future we can easily do it. Also note that
> your current dts will cause a bindings error because the current
> bindings _require_ you to have two compatible strings.
Okay
next prev parent reply other threads:[~2021-09-16 4:32 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-03 4:28 [PATCH V7 0/7] Add QSPI and QUPv3 DT nodes for SC7280 SoC Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 1/7] arm64: dts: sc7280: Add QSPI node Rajesh Patil
2021-09-03 15:54 ` Matthias Kaehlcke
2021-09-03 16:28 ` Doug Anderson
2021-09-16 4:31 ` rajpat [this message]
2021-09-03 4:28 ` [PATCH V7 2/7] arm64: dts: sc7280: Configure SPI-NOR FLASH for sc7280-idp Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 3/7] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes Rajesh Patil
2021-09-03 16:33 ` Matthias Kaehlcke
2021-09-09 4:46 ` rajpat
2021-09-09 14:06 ` Matthias Kaehlcke
2021-09-03 4:28 ` [PATCH V7 4/7] arm64: dts: sc7280: Update QUPv3 UART5 DT node Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 5/7] arm64: dts: sc7280: Configure uart7 to support bluetooth on sc7280-idp Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 6/7] arm64: dts: sc7280: Add QUPv3 wrapper_1 nodes Rajesh Patil
2021-09-03 17:22 ` Matthias Kaehlcke
2021-09-09 4:44 ` rajpat
2021-09-09 14:07 ` Matthias Kaehlcke
2021-09-03 4:29 ` [PATCH V7 7/7] arm64: dts: sc7280: Add aliases for I2C and SPI Rajesh Patil
2021-09-03 19:01 ` Stephen Boyd
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=188e0a1f45336cc56ac2abb98d53dbde@codeaurora.org \
--to=rajpat@codeaurora.org \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=dianders@chromium.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mka@chromium.org \
--cc=msavaliy@qti.qualcomm.com \
--cc=rnayak@codeaurora.org \
--cc=robh+dt@kernel.org \
--cc=rojay@codeaurora.org \
--cc=saiprakash.ranjan@codeaurora.org \
--cc=sboyd@kernel.org \
--cc=skakit@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).