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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAyMDA5MCBTYWx0ZWRfX4Bffk40kzyTw a2qddeLTtRkSA4f0ChM5IfXq1L29MNeNWpLcktUZH5i0gTJWjIBH7YprB7AyJvHmUMaeOt3zFi4 VmzfsodkS/J84BC/FACS6d31nij1GBIw++MwF8mYH44/B7wNlVqcGBdzqIQrBueEQqefuUgG4Ri TxU7yUJhDi8osGyB3AS/R7rBkeIEbscYxKmXkrCcLkArFs/2iteYxJOQQ69G3CLzVUdvrDTrZJs 5B23CuKCIVJxRHaaKJFxgQODZNRHbICuI3UqDRoOTqoG7DdZ6WmpneIhgNc/HbT2CaHGk+LywGl IjtenM7e2ccINZE6MPAkBuriOd+2u+RGDOUZIWN0J+927TCuu3Xa3dgibLK9OfzqK+CoTrRxaCM 8OkPouOpVs/57cZHU6s/OWbO7MSRiL+yOohKOWRl4mgQQnScBc3GbrXlRtTKeFU+LKyfYPWE54z rGNzYK9NZlvkGaOMXMg== X-Proofpoint-GUID: 6CXvLy-72obFWA5PKLLIIjLjGsSTSx89 X-Proofpoint-ORIG-GUID: 6CXvLy-72obFWA5PKLLIIjLjGsSTSx89 X-Authority-Analysis: v=2.4 cv=VLrtWdPX c=1 sm=1 tr=0 ts=6a97f65a cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=uUvTuc4oTmGzQ4V00ZcA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAyMDA5MCBTYWx0ZWRfX8KFL2Wl9C+DA V47bBbL/Eh22+MI6Sl5yInb6wPdDlTHrvwS1hHLAYiVMh6oU+/KAtZvXQOtDkV16MAEWQS2Xak6 Dh2/oX9dsAoBYd6z30TMT3Fbzl9/ZaU= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-02_02,2026-09-01_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 malwarescore=0 adultscore=0 priorityscore=1501 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609020090 On 8/28/26 10:43 AM, Krishna Chaitanya Chundru wrote: > Add support for the Nord Gen5x16 bifurcated QMP PCIe PHY. > > Nord has a single PCIe PHY block split into four ports which can be > used in multiple lane configurations: x16, x8+x8, x8+x4+x4 and > x8+x4+x2+x2. The active topology is selected through the link mode > configuration register, and the driver exposes the corresponding PHY > instances based on that mode. [...] > +static const char * const nord_pciephy_port_a_vreg_l[] = { > + "vdda-phy-a", "vdda-pll-a", > +}; > + > +static const char * const nord_pciephy_port_b_vreg_l[] = { > + "vdda-phy-b", "vdda-pll-b", > +}; > + > +static const char * const nord_pciephy_port_c_vreg_l[] = { > + "vdda-phy-c", "vdda-pll-c", > +}; > + > +static const char * const nord_pciephy_port_d_vreg_l[] = { > + "vdda-phy-d", "vdda-pll-d", > +}; > + > +static const char * const nord_pciephy_port_cd_vreg_l[] = { > + "vdda-phy-c", "vdda-phy-d", "vdda-pll-c", "vdda-pll-d", > +}; > + > +static const char * const nord_pciephy_port_bcd_vreg_l[] = { > + "vdda-phy-b", "vdda-phy-c", "vdda-phy-d", > + "vdda-pll-b", "vdda-pll-c", "vdda-pll-d", > +}; Can we only list a/b/c/d resources and then take a union of them as necessary for combined modes? > +static struct qmp_phy_init_tbl nord_qmp_pcie_pll_a_tbl[] = { The abcd tables are identical except for the last 2 writes. Factor out the common config and create overlays. [...] > +static const char * const nord_pciephy_port_a_reg_l[] = { "port_a" }; We already have some of these symbols in this file that shouldn't carry any SoC prefix Konrad