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Thu, 19 Oct 2023 05:48:21 -0700 (PDT) Received: from [192.168.1.20] ([178.197.218.126]) by smtp.gmail.com with ESMTPSA id l10-20020a1c790a000000b004063cced50bsm4304072wme.23.2023.10.19.05.48.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 Oct 2023 05:48:20 -0700 (PDT) Message-ID: <1917c764-9356-4f6e-94d6-1c8a92f4d6a5@linaro.org> Date: Thu, 19 Oct 2023 14:48:17 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/5] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC Content-Language: en-US To: Mrinmay Sarkar , agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Kishon Vijay Abraham I , Vinod Koul , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-phy@lists.infradead.org References: <1697715430-30820-1-git-send-email-quic_msarkar@quicinc.com> <1697715430-30820-2-git-send-email-quic_msarkar@quicinc.com> From: Krzysztof Kozlowski Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 19/10/2023 13:37, Mrinmay Sarkar wrote: > Add devicetree bindings support for SA8775P SoC. It has DMA register > space and dma interrupt to support HDMA. > > Signed-off-by: Mrinmay Sarkar > --- > .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 44 +++++++++++++++++++++- > 1 file changed, 42 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > index a223ce0..7485248 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > @@ -13,6 +13,7 @@ properties: > compatible: > oneOf: > - enum: > + - qcom,sa8775p-pcie-ep > - qcom,sdx55-pcie-ep > - qcom,sm8450-pcie-ep > - items: > @@ -20,6 +21,7 @@ properties: > - const: qcom,sdx55-pcie-ep > > reg: > + minItems: 6 > items: > - description: Qualcomm-specific PARF configuration registers > - description: DesignWare PCIe registers > @@ -27,8 +29,10 @@ properties: > - description: Address Translation Unit (ATU) registers > - description: Memory region used to map remote RC address space > - description: BAR memory region > + - description: DMA register space You need to constrain IO space in all other variants. > > reg-names: > + minItems: 6 > items: > - const: parf > - const: dbi > @@ -36,13 +40,14 @@ properties: > - const: atu > - const: addr_space > - const: mmio > + - const: dma > > clocks: > - minItems: 7 > + minItems: 5 > maxItems: 8 > > clock-names: > - minItems: 7 > + minItems: 5 > maxItems: 8 > > qcom,perst-regs: > @@ -57,14 +62,18 @@ properties: > - description: Perst separation enable offset > > interrupts: > + minItems: 2 > items: > - description: PCIe Global interrupt > - description: PCIe Doorbell interrupt > + - description: DMA interrupt > > interrupt-names: > + minItems: 2 > items: > - const: global > - const: doorbell > + - const: dma You need to constrain interrupts in all other variants. > > reset-gpios: > description: GPIO used as PERST# input signal > @@ -173,6 +182,37 @@ allOf: > - const: ddrss_sf_tbu > - const: aggre_noc_axi > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,sa8775p-pcie-ep > + then: > + properties: > + reg: > + minItems: 7 As well: maxItems: 7 Otherwise any future update will for sure miss this and relax the reg. > + reg-names: > + minItems: 7 Ditto > + clocks: > + items: > + - description: PCIe Auxiliary clock > + - description: PCIe CFG AHB clock > + - description: PCIe Master AXI clock > + - description: PCIe Slave AXI clock > + - description: PCIe Slave Q2A AXI clock > + clock-names: > + items: > + - const: aux > + - const: cfg > + - const: bus_master > + - const: bus_slave > + - const: slave_q2a > + interrupts: > + minItems: 3 Ditto > + interrupt-names: > + minItems: 3 Ditto > + > unevaluatedProperties: false > > examples: Best regards, Krzysztof