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From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Stephen Boyd <sboyd@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej@kernel.org>,
	Samuel Holland <samuel@sholland.org>,
	Chen-Yu Tsai <wens@kernel.org>
Cc: Andre Przywara <andre.przywara@arm.com>,
	linux-sunxi@lists.linux.dev, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 7/7] arm64: dts: allwinner: a523: Add NPU device node
Date: Thu, 11 Sep 2025 20:46:42 +0200	[thread overview]
Message-ID: <1930957.tdWV9SEqCh@jernej-laptop> (raw)
In-Reply-To: <20250911174710.3149589-8-wens@kernel.org>

Dne četrtek, 11. september 2025 ob 19:47:10 Srednjeevropski poletni čas je Chen-Yu Tsai napisal(a):
> From: Chen-Yu Tsai <wens@csie.org>
> 
> The Allwinner T527 SoC has an NPU built in. Based on identifiers found
> in the BSP, it is a Vivante IP block. After enabling it, the etnaviv
> driver reports it as a GC9000 revision 9003.
> 
> The standard bindings are used as everything matches directly. There is
> no option for DVFS at the moment. That might require some more work,
> perhaps on the efuse side to map speed bins.
> 
> It is unclear whether the NPU block is fused out at the hardware level
> or the BSP limits use of the NPU through software, as the author only
> has boards with the T527.
> 
> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>


Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

> ---
>  arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> index f93376372aba..9676caf9bd4e 100644
> --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> @@ -852,6 +852,18 @@ mcu_ccu: clock-controller@7102000 {
>  			#clock-cells = <1>;
>  			#reset-cells = <1>;
>  		};
> +
> +		npu: npu@7122000 {
> +			compatible = "vivante,gc";
> +			reg = <0x07122000 0x1000>;
> +			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&mcu_ccu CLK_BUS_MCU_NPU_ACLK>,
> +				 <&ccu CLK_NPU>,
> +				 <&mcu_ccu CLK_BUS_MCU_NPU_HCLK>;
> +			clock-names = "bus", "core", "reg";
> +			resets = <&mcu_ccu RST_BUS_MCU_NPU>;
> +			power-domains = <&ppu PD_NPU>;
> +		};
>  	};
>  
>  	thermal-zones {
> 





  reply	other threads:[~2025-09-11 18:46 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-11 17:47 [PATCH v2 0/7] arm64: allwinner: a523: Enable MCU PRCM and NPU Chen-Yu Tsai
2025-09-11 17:47 ` [PATCH v2 1/7] dt-bindings: clock: sun55i-a523-ccu: Add missing NPU module clock Chen-Yu Tsai
2025-09-11 17:47 ` [PATCH v2 2/7] dt-bindings: clock: sun55i-a523-ccu: Add A523 MCU CCU clock controller Chen-Yu Tsai
2025-09-11 17:47 ` [PATCH v2 3/7] clk: sunxi-ng: sun55i-a523-ccu: Add missing NPU module clock Chen-Yu Tsai
2025-09-11 18:07   ` Jernej Škrabec
2025-09-12 10:19   ` Andre Przywara
2025-09-11 17:47 ` [PATCH v2 4/7] clk: sunxi-ng: div: support power-of-two dividers Chen-Yu Tsai
2025-09-11 18:08   ` Jernej Škrabec
2025-09-11 17:47 ` [PATCH v2 5/7] clk: sunxi-ng: add support for the A523/T527 MCU CCU Chen-Yu Tsai
2025-09-11 18:45   ` Jernej Škrabec
2025-09-11 17:47 ` [PATCH v2 6/7] arm64: dts: allwinner: a523: Add MCU PRCM CCU node Chen-Yu Tsai
2025-09-11 18:46   ` Jernej Škrabec
2025-09-11 17:47 ` [PATCH v2 7/7] arm64: dts: allwinner: a523: Add NPU device node Chen-Yu Tsai
2025-09-11 18:46   ` Jernej Škrabec [this message]
2025-09-13  5:55 ` [PATCH v2 0/7] arm64: allwinner: a523: Enable MCU PRCM and NPU Chen-Yu Tsai
2025-09-13  5:55 ` Chen-Yu Tsai
2025-09-13  6:16 ` (subset) " Chen-Yu Tsai

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