From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Subject: [PATCH v5 5/7] ARM: dts: r8a7743: add IRQC support Date: Fri, 28 Oct 2016 00:39:25 +0300 Message-ID: <1932405.6Lc0BeJuRW@wasted.cogentembedded.com> References: <1580369.yToZzJza1l@wasted.cogentembedded.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: <1580369.yToZzJza1l@wasted.cogentembedded.com> Sender: linux-renesas-soc-owner@vger.kernel.org To: horms@verge.net.au, linux-renesas-soc@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Cc: magnus.damm@gmail.com, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Describe the IRQC interrupt controller in the R8A7743 device tree. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven --- Changes in version 4: - refreshed the patch; - added Geert's tag. Changes in version 3: - updated the "clocks" property for the CPG/MSSR driver. Changes in version 2: - new patch. arch/arm/boot/dts/r8a7743.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7743.dtsi =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7743.dtsi +++ renesas/arch/arm/boot/dts/r8a7743.dtsi @@ -62,6 +62,25 @@ IRQ_TYPE_LEVEL_HIGH)>; }; + irqc: interrupt-controller@e61c0000 { + compatible = "renesas,irqc-r8a7743", "renesas,irqc"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0 0xe61c0000 0 0x200>; + interrupts = , + , + , + , + , + , + , + , + , + ; + clocks = <&cpg CPG_MOD 407>; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + }; + timer { compatible = "arm,armv7-timer"; interrupts =