From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: "Cyprian Wronka" <cwronka@cadence.com>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Rob Herring" <robh+dt@kernel.org>,
"linux-media@vger.kernel.org" <linux-media@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"Neil Webb" <neilw@cadence.com>,
"Richard Sproul" <sproul@cadence.com>,
"Alan Douglas" <adouglas@cadence.com>,
"Steve Creaney" <screaney@cadence.com>,
"Thomas Petazzoni" <thomas.petazzoni@free-electrons.com>,
"Boris Brezillon" <boris.brezillon@free-electrons.com>,
"Niklas Söderlund" <niklas.soderlund@ragnatech.se>,
"Hans Verkuil" <hans.verkuil@cisco.com>,
"Sakari Ailus" <sakari.ailus@linux.intel.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: media: Add Cadence MIPI-CSI2 RX Device Tree bindings
Date: Fri, 25 Aug 2017 19:34:55 +0300 [thread overview]
Message-ID: <1955840.czSnNPfaK8@avalon> (raw)
In-Reply-To: <20170825144440.beettgwsynics3hs@flea.lan>
Hi Maxime,
On Friday, 25 August 2017 17:44:40 EEST Maxime Ripard wrote:
> On Wed, Aug 23, 2017 at 12:03:32AM +0300, Laurent Pinchart wrote:
> >>>>>> + - phys: phandle to the external D-PHY
> >>>>>> + - phy-names: must contain dphy, if the implementation uses an
> >>>>>> + external D-PHY
> >>>>>
> >>>>> I would move the last two properties in an optional category as
> >>>>> they're effectively optional. I think you should also explain a bit
> >>>>> more clearly that the phys property must not be present if the phy-
> >>>>> names property is not present.
> >>>>
> >>>> It's not really optional. The IP has a configuration register that
> >>>> allows you to see if it's been synthesized with or without a PHY. If
> >>>> the right bit is set, that property will be mandatory, if not, it's
> >>>> useless.
> >>>
> >>> Just to confirm, the PHY is a separate IP core, right ? Is the CSI-2
> >>> receiver input interface different when used with a PHY and when used
> >>> without one ? Could a third-party PHY be used as well ? If so, would
> >>> the PHY synthesis bit be set or not ?
> >>
> >> The PHY (in our case a D-PHY) is a separate entity, it can be from a 3rd
> >> party as the IP interface is standard, the SoC integrator would set the
> >> bit accordingly based on whether any PHY is present or not. There is also
> >> an option of routing digital output from a CSI-TX to a CSI-RX and in such
> >> case a PHY would not need to be used (as in the case of our current
> >> platform).
> >
> > OK, thank you for the clarification.
> >
> > Maxime mentioned that a bit can be read from a register to notify whether
> > a PHY has been synthesized or not. Does it influence the CSI-2 RX input
> > interface at all, or is the CSI-2 RX IP core synthesized the same way
> > regardless of whether a PHY is present or not ?
>
> So we got an answer to this, and the physical interface remains the
> same.
>
> However, the PHY bit is set only when there's an internal D-PHY, which
> means we have basically three cases:
> - No D-PHY at all, D-PHY presence bit not set
> - Internal D-PHY, D-PHY presence bit set
> - External D-PHY, D-PHY presence bit not set
>
> I guess that solves our discussion about whether the phys property
> should be marked optional or not. It should indeed be optional, and
> when it's not there, the D-PHY presence bit will tell whether we have
> to program the internal D-PHY or not.
Is the internal D-PHY programmed through the register space of the CSI2-RX ?
If so I agree with you.
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2017-08-25 16:34 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-20 9:23 [PATCH v2 0/2] media: v4l: Add support for the Cadence MIPI-CSI2 RX Maxime Ripard
[not found] ` <20170720092302.2982-1-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-07-20 9:23 ` [PATCH v2 1/2] dt-bindings: media: Add Cadence MIPI-CSI2 RX Device Tree bindings Maxime Ripard
[not found] ` <20170720092302.2982-2-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-07-24 19:56 ` Rob Herring
2017-08-07 19:56 ` Benoit Parrot
2017-08-07 20:18 ` Laurent Pinchart
2017-08-22 8:53 ` Maxime Ripard
[not found] ` <20170822085320.pdxbxfv53rb75btu-ZC1Zs529Oq4@public.gmane.org>
2017-08-22 9:01 ` Laurent Pinchart
2017-08-22 19:25 ` Cyprian Wronka
[not found] ` <EB0D0DEA-1418-4237-910D-F0BE0B9069A1-vna1KIf7WgpBDgjK7y7TUQ@public.gmane.org>
2017-08-22 21:03 ` Laurent Pinchart
2017-08-25 14:44 ` Maxime Ripard
2017-08-25 16:34 ` Laurent Pinchart [this message]
2017-07-20 9:23 ` [PATCH v2 2/2] v4l: cadence: Add Cadence MIPI-CSI2 RX driver Maxime Ripard
[not found] ` <20170720092302.2982-3-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-07-23 1:09 ` kbuild test robot
2017-08-07 19:24 ` Benoit Parrot
[not found] ` <20170807192423.GD10611-l0cyMroinI0@public.gmane.org>
2017-08-25 14:03 ` Maxime Ripard
2017-08-07 20:42 ` Laurent Pinchart
2017-08-25 14:30 ` Maxime Ripard
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