From: "Heiko Stübner" <heiko@sntech.de>
To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Liu Ying <victor.liu@nxp.com>
Cc: neil.armstrong@linaro.org, conor+dt@kernel.org, rfoss@kernel.org,
krzysztof.kozlowski+dt@linaro.org, jonas@kwiboo.se,
shawnguo@kernel.org, s.hauer@pengutronix.de,
jernej.skrabec@gmail.com, robh+dt@kernel.org,
Laurent.pinchart@ideasonboard.com, andrzej.hajda@intel.com,
kernel@pengutronix.de, linux-imx@nxp.com
Subject: Re: [PATCH 5/9] drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate lbcc
Date: Mon, 16 Oct 2023 20:14:38 +0200 [thread overview]
Message-ID: <1971539.CrzyxZ31qj@diego> (raw)
In-Reply-To: <20230717061831.1826878-6-victor.liu@nxp.com>
Hi,
Am Montag, 17. Juli 2023, 08:18:27 CEST schrieb Liu Ying:
> To get better accuration, use pixel clock rate to calculate lbcc instead of
> lane_mbps since the pixel clock rate is in KHz while lane_mbps is in MHz.
> Without this, distorted image can be seen on a HDMI monitor connected with
> i.MX93 11x11 EVK through ADV7535 DSI to HDMI bridge in 1920x1080p@60 video
> mode.
>
> Signed-off-by: Liu Ying <victor.liu@nxp.com>
looks like I'm late to the party, but this change breaks the display output
my px30 minievb with the xinpeng xpp055c272 dsi display [0].
Found this commit via git bisection and added a bit of debug output to
compare the value differences for the old and new calculation:
[ 34.810722] dw_mipi_dsi_get_hcomponent_lbcc: old lbcc: 810 * 480 * 1000 / 8
[ 34.810749] dw_mipi_dsi_get_hcomponent_lbcc: new lbcc: 810 * 64000 * 24 / (4 * 8)
[ 34.810756] dw_mipi_dsi_get_hcomponent_lbcc: old lbcc: 48600000, new lbcc: 38880000
[ 34.810762] dw_mipi_dsi_get_hcomponent_lbcc: old lbcc: 10 * 480 * 1000 / 8
[ 34.810767] dw_mipi_dsi_get_hcomponent_lbcc: new lbcc: 10 * 64000 * 24 / (4 * 8)
[ 34.810773] dw_mipi_dsi_get_hcomponent_lbcc: old lbcc: 600000, new lbcc: 480000
[ 34.810778] dw_mipi_dsi_get_hcomponent_lbcc: old lbcc: 40 * 480 * 1000 / 8
[ 34.810783] dw_mipi_dsi_get_hcomponent_lbcc: new lbcc: 40 * 64000 * 24 / (4 * 8)
[ 34.810789] dw_mipi_dsi_get_hcomponent_lbcc: old lbcc: 2400000, new lbcc: 1920000
With the new lbcc I get a blank dsi panel and just going back to the old
calculation of lbcc restores the image.
I don't have that much in-depth knowledge about dsi stuff and the original
panel times also "just" came from the vendor tree, but I really would like
to keep that display working ;-) .
Do you have any idea which way to go to fix this?
Thanks
Heiko
[0]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/rockchip/px30-evb.dts#n138
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
> ---
> drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
> index c754d55f71d1..332388fd86da 100644
> --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
> @@ -12,6 +12,7 @@
> #include <linux/component.h>
> #include <linux/debugfs.h>
> #include <linux/iopoll.h>
> +#include <linux/math64.h>
> #include <linux/media-bus-format.h>
> #include <linux/module.h>
> #include <linux/of_device.h>
> @@ -762,8 +763,15 @@ static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
> u32 hcomponent)
> {
> u32 frac, lbcc;
> + int bpp;
>
> - lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
> + bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
> + if (bpp < 0) {
> + dev_err(dsi->dev, "failed to get bpp\n");
> + return 0;
> + }
> +
> + lbcc = div_u64((u64)hcomponent * mode->clock * bpp, dsi->lanes * 8);
next prev parent reply other threads:[~2023-10-16 18:14 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-17 6:18 [PATCH 0/9] drm/bridge: imx: Add i.MX93 MIPI DSI support Liu Ying
2023-07-17 6:18 ` [PATCH 1/9] drm/bridge: synopsys: dw-mipi-dsi: Add dw_mipi_dsi_get_bridge() helper Liu Ying
2023-07-17 6:18 ` [PATCH 2/9] drm/bridge: synopsys: dw-mipi-dsi: Add input bus format negotiation support Liu Ying
2023-07-17 6:18 ` [PATCH 3/9] drm/bridge: synopsys: dw-mipi-dsi: Force input bus flags Liu Ying
2023-07-17 6:18 ` [PATCH 4/9] drm/bridge: synopsys: dw-mipi-dsi: Add mode fixup support Liu Ying
2023-07-17 6:18 ` [PATCH 5/9] drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate lbcc Liu Ying
2023-08-01 9:42 ` neil.armstrong
2023-10-16 18:14 ` Heiko Stübner [this message]
2023-10-17 10:15 ` Ying Liu
2023-10-17 12:13 ` Heiko Stübner
2023-07-17 6:18 ` [PATCH 6/9] drm/bridge: synopsys: dw-mipi-dsi: Set minimum lane byte clock cycles for HSA and HBP Liu Ying
2023-08-01 9:42 ` neil.armstrong
2023-07-17 6:18 ` [PATCH 7/9] drm/bridge: synopsys: dw-mipi-dsi: Disable HSTX and LPRX timeout check Liu Ying
2023-08-01 9:42 ` neil.armstrong
2023-07-17 6:18 ` [PATCH 8/9] dt-bindings: display: bridge: Document Freescale i.MX93 MIPI DSI Liu Ying
2023-07-18 22:24 ` Rob Herring
2023-07-17 6:18 ` [PATCH 9/9] drm/bridge: imx: Add i.MX93 MIPI DSI support Liu Ying
2023-07-17 6:44 ` Jagan Teki
2023-07-18 2:58 ` Ying Liu
2023-07-18 9:34 ` Jagan Teki
2023-07-18 9:49 ` Ying Liu
2023-07-18 10:50 ` Jagan Teki
2023-07-19 8:35 ` Ying Liu
2023-07-30 18:38 ` Jagan Teki
2023-07-18 7:49 ` Alexander Stein
2023-07-18 9:00 ` Ying Liu
2023-07-18 9:31 ` Alexander Stein
2023-07-18 9:55 ` Ying Liu
2023-07-18 15:46 ` Sam Ravnborg
2023-07-19 8:37 ` Ying Liu
2023-07-19 1:10 ` kernel test robot
2023-07-18 7:39 ` [PATCH 0/9] " Alexander Stein
2023-07-18 8:52 ` Ying Liu
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