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[83.9.32.53]) by smtp.gmail.com with ESMTPSA id c11-20020ac25f6b000000b0048af9576d30sm3240384lfc.83.2023.01.12.04.12.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Jan 2023 04:12:36 -0800 (PST) Message-ID: <19a7a3ca-6a7e-125f-38c6-9caed183ddbc@linaro.org> Date: Thu, 12 Jan 2023 13:12:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH 03/13] clk: qcom: cpu-8996: fix the init clock rate To: Dmitry Baryshkov , Andy Gross , Bjorn Andersson , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org References: <20230111192004.2509750-1-dmitry.baryshkov@linaro.org> <20230111192004.2509750-4-dmitry.baryshkov@linaro.org> <9a3071e1-0e3f-ae87-0574-7659c52bc884@linaro.org> <0a2e9def-c963-d4cd-eb2e-2b9adfa2fd1a@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <0a2e9def-c963-d4cd-eb2e-2b9adfa2fd1a@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 11.01.2023 22:51, Dmitry Baryshkov wrote: > On 11/01/2023 22:58, Konrad Dybcio wrote: >> >> >> On 11.01.2023 20:19, Dmitry Baryshkov wrote: >>> Change PLL programming to let both power and performance cluster clocks >>> to start from the maximum common frequency. >>> >>> Signed-off-by: Dmitry Baryshkov >>> --- >> Can you point me to the source of this? My local random msm-3.18 has this at 60. > > Yes, but with 60 cluster start at the unlisted frequency (60 * 19.2 = 1152 MHz), which leads to cpufreq whining and immediately performing a switch. > > I modified this to 54 * 19.2 =  1036.8 MHz which is supported by both power and performance clusters. Maybe we could have gone to 58 * 19.2 = 1113. Mhz or to 62 * 19.2 = 1190.4 MHz, but as all the safety and power measures and not probed at this point, I preferred to rather be safe than sorry. Okay, please include this reasoning in the commit message, as nobody would guess it fixes this issue.. Konrad > >> >> Konrad >>>   drivers/clk/qcom/clk-cpu-8996.c | 2 +- >>>   1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c >>> index ed8cb558e1aa..d51965fda56d 100644 >>> --- a/drivers/clk/qcom/clk-cpu-8996.c >>> +++ b/drivers/clk/qcom/clk-cpu-8996.c >>> @@ -102,7 +102,7 @@ static const u8 alt_pll_regs[PLL_OFF_MAX_REGS] = { >>>   /* PLLs */ >>>     static const struct alpha_pll_config hfpll_config = { >>> -    .l = 60, >>> +    .l = 54, >>>       .config_ctl_val = 0x200d4828, >>>       .config_ctl_hi_val = 0x006, >>>       .test_ctl_val = 0x1c000000, >