From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Sarah Walker <sarah.walker@imgtec.com>, dri-devel@lists.freedesktop.org
Cc: frank.binns@imgtec.com, donald.robson@imgtec.com,
boris.brezillon@collabora.com, faith.ekstrand@collabora.com,
airlied@gmail.com, daniel@ffwll.ch,
maarten.lankhorst@linux.intel.com, mripard@kernel.org,
tzimmermann@suse.de, afd@ti.com, hns@goldelico.com,
matthew.brost@intel.com, christian.koenig@amd.com,
luben.tuikov@amd.com, dakr@redhat.com,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v4 02/17] dt-bindings: gpu: Add Imagination Technologies PowerVR GPU
Date: Mon, 17 Jul 2023 09:29:48 +0200 [thread overview]
Message-ID: <19a7dae4-a9bd-187f-49f8-fe9c47f44eff@linaro.org> (raw)
In-Reply-To: <20230714142526.111569-1-sarah.walker@imgtec.com>
On 14/07/2023 16:25, Sarah Walker wrote:
> Add the device tree binding documentation for the Series AXE GPU used in
> TI AM62 SoCs.
>
...
> +
> + clocks:
> + minItems: 1
> + maxItems: 3
> +
> + clock-names:
> + items:
> + - const: core
> + - const: mem
> + - const: sys
> + minItems: 1
Why clocks for this device vary? That's really unusual to have a SoC IP
block which can have a clock physically disconnected, depending on the
board (not SoC!).
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-07-17 7:29 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-14 14:25 [PATCH v4 02/17] dt-bindings: gpu: Add Imagination Technologies PowerVR GPU Sarah Walker
2023-07-15 10:40 ` Conor Dooley
2023-07-18 11:08 ` Frank Binns
2023-07-18 11:10 ` Krzysztof Kozlowski
2023-07-18 11:24 ` mripard
2023-07-18 11:36 ` Frank Binns
2023-07-18 11:52 ` Krzysztof Kozlowski
2023-07-17 7:29 ` Krzysztof Kozlowski [this message]
2023-07-18 11:32 ` Frank Binns
2023-07-18 13:06 ` Krzysztof Kozlowski
2023-07-18 6:20 ` Krzysztof Kozlowski
2023-07-18 11:47 ` Frank Binns
2023-07-18 11:54 ` Krzysztof Kozlowski
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