Re: [PATCH V5 2/4] arm64: dts: qcom: sa8775p: add EPSS l3 interconnect provider

[Krzysztof Kozlowski <krzk@kernel.org>]

On 21/11/2024 18:49, Raviteja Laggyshetty wrote:
> 
> 
> On 11/21/2024 5:24 PM, Krzysztof Kozlowski wrote:
>> On 21/11/2024 12:30, Raviteja Laggyshetty wrote:
>>> Add Epoch Subsystem (EPSS) L3 interconnect provider node on SA8775P
>>> SoCs.
>>>
>>> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
>>> ---
>>>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 19 +++++++++++++++++++
>>>  1 file changed, 19 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> index 9f315a51a7c1..dd7207eb3616 100644
>>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> @@ -10,6 +10,7 @@
>>>  #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
>>>  #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
>>>  #include <dt-bindings/dma/qcom-gpi.h>
>>> +#include <dt-bindings/interconnect/qcom,osm-l3.h>
>>>  #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
>>>  #include <dt-bindings/mailbox/qcom-ipcc.h>
>>>  #include <dt-bindings/firmware/qcom,scm.h>
>>> @@ -4282,6 +4283,15 @@ rpmhpd_opp_turbo_l1: opp-9 {
>>>  			};
>>>  		};
>>>  
>>> +		epss_l3_cl0: interconnect@18590000 {
>>
>>
>> Drop unused label.
>>
> This will be used by DCVS driver for getting the interconnect path.

Fine then.


Best regards,
Krzysztof