From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 739E2C04A95 for ; Sat, 22 Oct 2022 16:28:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229515AbiJVQ2m (ORCPT ); Sat, 22 Oct 2022 12:28:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55988 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229785AbiJVQ2i (ORCPT ); Sat, 22 Oct 2022 12:28:38 -0400 Received: from mail-oi1-x231.google.com (mail-oi1-x231.google.com [IPv6:2607:f8b0:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7057713A7C5 for ; Sat, 22 Oct 2022 09:28:36 -0700 (PDT) Received: by mail-oi1-x231.google.com with SMTP id g10so6562186oif.10 for ; Sat, 22 Oct 2022 09:28:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=g3ny+yXpYDqLgCl1b12wzlahRflhVPiMY2auk8rtU9A=; b=JdjPExc59m1e2oyhgLWsKrEbhHJUNp3rx52BD3ksxMWuy2Y1q7cAjERfKDTFb7ojf+ uaCYqxoqvwfrVXiIBjI84aWy6Sb40M8dHHH/+mUOK8VZE7S82aY5TuBFED5NMOFMDTCh bO046RFT+6uIrWK3ZwYENkB1OFrPnT3ybrPqGL0CoPW6cNZO4JjLRqCZXaDGQVv6ywQA tuhKYVpWFXvMEreOiG7/EueX1PZ5hgMNMuYNJXKn4KSSIMqZB9nFHLoR/WWDyAujYcFQ vKjHyg73LewI90SjFaL3MMwYb3wx4oCLsjiCZ/mbF5pSl6tE60R/SWOLJHpnjw1Mj10w hiCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=g3ny+yXpYDqLgCl1b12wzlahRflhVPiMY2auk8rtU9A=; b=PwhspzNnxkAOBYZeGBqBgC29hv24bSm0UnyYKdcF+0+TA8M//MTHSf+sA4ukdEjzuO FVWAZnQCU5WdH0GE6bgqMFx2322Gu/zJx+UUgh4UaX1i6o9Ptfrwc9az2NHZBxCsIo6k gp/ht1xu6dXcXMRA9hGjGgJwtCD8+9+6qbsrgq5nJjWQAyCdLqtTqfdJszZpEgRgg5Q5 O3+NN1/+YUZsBLOV9ABRsLzTmcJeRla+rMFoD1CmWcZ6gpwP4QFsoMRTjVI5xGI4tvAi SzfEDraVjo31Av6JXhVOTwfnVrL5HFKecbyub00l7DvIWoh9iksgQAcwEU10GVdoJiZM ADlw== X-Gm-Message-State: ACrzQf2ZXmc1LhLGMzyydRN2H6k57apgznYeZftiKHdws2Cmg6EGqN3/ cF2y1LNNRXhFk9xrXnRpraiH+Q== X-Google-Smtp-Source: AMsMyM634zWdX9U8U9UebN4uP0I0NHWWXs08sHj/vn8eEv9h2ANg8MGdNdngwgd9cwKtD9sU/cL1zg== X-Received: by 2002:aca:c143:0:b0:355:4f9a:78a0 with SMTP id r64-20020acac143000000b003554f9a78a0mr11757740oif.245.1666456115751; Sat, 22 Oct 2022 09:28:35 -0700 (PDT) Received: from [10.203.8.70] ([205.153.95.177]) by smtp.gmail.com with ESMTPSA id d8-20020a056870960800b00127fbb7afffsm11282161oaq.5.2022.10.22.09.28.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 22 Oct 2022 09:28:35 -0700 (PDT) Message-ID: <1a1ab959-8c0b-90f8-347f-9809fe4b23d7@linaro.org> Date: Sat, 22 Oct 2022 12:28:31 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.0 Subject: Re: [PATCH v2 3/5] dt-bindings: mmc: mtk-sd: Set clocks based on compatible Content-Language: en-US To: Frank Wunderlich , linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Chaotian Jing , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Wenbin Mei , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?B?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= References: <20221022090530.16265-1-linux@fw-web.de> <20221022090530.16265-4-linux@fw-web.de> From: Krzysztof Kozlowski In-Reply-To: <20221022090530.16265-4-linux@fw-web.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 22/10/2022 05:05, Frank Wunderlich wrote: > From: Nícolas F. R. A. Prado > > The binding was describing a single clock list for all platforms, but > that's not really suitable: mt2712 requires an extra 'bus_clk' on some > of its controllers, while mt8192 requires four different extra clocks. > The rest of the platforms can share the same 3 clocks, with the third > being optional as it's not present on all platforms. It was also wrong... > > Move the clock definitions inside if blocks that match on the > compatibles. In practice this gets rid of dtbs_check warnings on mt8192, > since the 'bus_clk' clock from mt2712 is no longer expected on this > platform. > > Fixes: 59a23395d8aa ("dt-bindings: mmc: Add support for MT8192 SoC") > Signed-off-by: Nícolas F. R. A. Prado > Signed-off-by: Frank Wunderlich > --- > .../devicetree/bindings/mmc/mtk-sd.yaml | 111 +++++++++++++----- > 1 file changed, 81 insertions(+), 30 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml > index 3cbf0208f1b4..c7bcf0c3dd5d 100644 > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml > @@ -10,9 +10,6 @@ maintainers: > - Chaotian Jing > - Wenbin Mei > > -allOf: > - - $ref: mmc-controller.yaml# > - > properties: > compatible: > oneOf: > @@ -49,27 +46,11 @@ properties: > description: > Should contain phandle for the clock feeding the MMC controller. > minItems: 2 > - items: > - - description: source clock (required). > - - description: HCLK which used for host (required). > - - description: independent source clock gate (required for MT2712). > - - description: bus clock used for internal register access (required for MT2712 MSDC0/3). > - - description: msdc subsys clock gate (required for MT8192). > - - description: peripheral bus clock gate (required for MT8192). > - - description: AXI bus clock gate (required for MT8192). > - - description: AHB bus clock gate (required for MT8192). > + maxItems: 7 Confusing to see 8 clocks replaced by 7, but I guess this is problem of old bindings. > > clock-names: > minItems: 2 > - items: > - - const: source > - - const: hclk > - - const: source_cg > - - const: bus_clk > - - const: sys_cg > - - const: pclk_cg > - - const: axi_cg > - - const: ahb_cg > + maxItems: 7 > > interrupts: > description: > @@ -191,15 +172,85 @@ required: > - vmmc-supply > - vqmmc-supply > > -if: > - properties: > - compatible: > - contains: > - const: mediatek,mt8183-mmc > -then: > - properties: > - reg: > - minItems: 2 > +allOf: > + - $ref: mmc-controller.yaml# > + - if: > + properties: > + compatible: > + contains: > + const: mediatek,mt8183-mmc > + then: > + properties: > + reg: > + minItems: 2 Blank line > + - if: > + properties: > + compatible: > + contains: > + const: mediatek,mt8192-mmc > + then: > + properties: > + clocks: > + items: > + - description: source clock > + - description: HCLK which used for host > + - description: independent source clock gate > + - description: msdc subsys clock gate > + - description: peripheral bus clock gate > + - description: AXI bus clock gate > + - description: AHB bus clock gate > + clock-names: > + items: > + - const: source > + - const: hclk > + - const: source_cg > + - const: sys_cg > + - const: pclk_cg > + - const: axi_cg > + - const: ahb_cg Blank line > + - if: > + properties: > + compatible: > + contains: > + const: mediatek,mt2712-mmc > + then: > + properties: > + clocks: > + minItems: 3 > + items: > + - description: source clock > + - description: HCLK which used for host > + - description: independent source clock gate > + - description: bus clock used for internal register access (required for MSDC0/3). > + clock-names: > + minItems: 3 > + items: > + - const: source > + - const: hclk > + - const: source_cg > + - const: bus_clk Blank line > + - if: > + not: Can you not use negation, but list applicable compatibles? It would be easier to read, I think > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt2712-mmc > + - mediatek,mt8192-mmc Best regards, Krzysztof