From: Dinh Nguyen <dinguyen@kernel.org>
To: Ley Foon Tan <ley.foon.tan@intel.com>,
"Ooi, Joyce" <joyce.ooi@intel.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Ong Hean Loong <hean.loong.ong@intel.com>,
See Chin Liang <chin.liang.see@intel.com>
Subject: Re: [PATCHv2] arm64: dts: agilex: add QSPI support for Intel Agilex
Date: Mon, 21 Oct 2019 22:42:23 -0500 [thread overview]
Message-ID: <1a497a81-da4c-973b-3bfe-4d676e4a3715@kernel.org> (raw)
In-Reply-To: <1571360401.2504.3.camel@intel.com>
On 10/17/19 8:00 PM, Ley Foon Tan wrote:
> On Wed, 2019-10-16 at 02:40 -0700, Ooi, Joyce wrote:
>> This patch adds QSPI flash interface in device tree for Intel Agilex
>>
>> Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
>> ---
>> v2: update the qspi_rootfs partition size
>> ---
>> arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 35
>> ++++++++++++++++++++++
>> 1 file changed, 35 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> index 7814a9e..8de8118 100644
>> --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> @@ -73,3 +73,38 @@
>> &watchdog0 {
>> status = "okay";
>> };
>> +
>> +&qspi {
>> + flash@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "mt25qu02g";
>> + reg = <0>;
>> + spi-max-frequency = <50000000>;
> QSPI can support up to 100MHz.
I've updated the patch accordingly.
Dinh
prev parent reply other threads:[~2019-10-22 3:42 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1571218846-12306-1-git-send-email-joyce.ooi@intel.com>
2019-10-18 1:00 ` [PATCHv2] arm64: dts: agilex: add QSPI support for Intel Agilex Ley Foon Tan
2019-10-22 3:42 ` Dinh Nguyen [this message]
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