From: Sean Anderson <sean.anderson@linux.dev>
To: David Lechner <dlechner@baylibre.com>,
Mark Brown <broonie@kernel.org>,
Michal Simek <michal.simek@amd.com>,
linux-spi@vger.kernel.org
Cc: "Jinjie Ruan" <ruanjinjie@huawei.com>,
linux-arm-kernel@lists.infradead.org,
"Amit Kumar Mahapatra" <amit.kumar-mahapatra@amd.com>,
linux-kernel@vger.kernel.org,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Rob Herring" <robh@kernel.org>,
devicetree@vger.kernel.org,
"linux-iio@vger.kernel.org" <linux-iio@vger.kernel.org>,
"Jonathan Cameron" <jic23@kernel.org>,
"Nuno Sá" <nuno.sa@analog.com>
Subject: Re: [PATCH 1/7] dt-bindings: spi: zynqmp-qspi: Split the bus
Date: Fri, 13 Jun 2025 12:44:20 -0400 [thread overview]
Message-ID: <1a8c923f-0905-4cc0-9fbd-949d29a2f39b@linux.dev> (raw)
In-Reply-To: <f3160819-f6f4-4079-9562-802caa2fef20@linux.dev>
On 6/13/25 11:57, Sean Anderson wrote:
> On 6/13/25 10:20, David Lechner wrote:
>> On 6/12/25 6:44 PM, Sean Anderson wrote:
>>> Hi David,
>>>
>>> I am (finally!) getting around to doing v2 of this series, and I ran
>>> into a small problem with your proposed solution.
>>>
>>> On 1/23/25 16:59, David Lechner wrote:
>>>> ---
>>>> From: David Lechner <dlechner@baylibre.com>
>>>> Date: Thu, 23 Jan 2025 15:35:19 -0600
>>>> Subject: [PATCH 2/2] spi: add support for multi-bus controllers
>>>>
>>>> Add support for SPI controllers with multiple physical SPI buses.
>>>>
>>>> This is common in the type of controller that can be used with parallel
>>>> flash memories, but can be used for general purpose SPI as well.
>>>>
>>>> To indicate support, a controller just needs to set ctlr->num_buses to
>>>> something greater than 1. Peripherals indicate which bus they are
>>>> connected to via device tree (ACPI support can be added if needed).
>>>>
>>>> In the future, this can be extended to support peripherals that also
>>>> have multiple SPI buses to use those buses at the same time by adding
>>>> a similar bus flags field to struct spi_transfer.
>>>>
>>>> Signed-off-by: David Lechner <dlechner@baylibre.com>
>>>> ---
>>>> drivers/spi/spi.c | 26 +++++++++++++++++++++++++-
>>>> include/linux/spi/spi.h | 13 +++++++++++++
>>>> 2 files changed, 38 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
>>>> index 10c365e9100a..f7722e5e906d 100644
>>>> --- a/drivers/spi/spi.c
>>>> +++ b/drivers/spi/spi.c
>>>> @@ -2364,7 +2364,7 @@ static void of_spi_parse_dt_cs_delay(struct device_node *nc,
>>>> static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
>>>> struct device_node *nc)
>>>> {
>>>> - u32 value, cs[SPI_CS_CNT_MAX];
>>>> + u32 value, buses[8], cs[SPI_CS_CNT_MAX];
>>>> int rc, idx;
>>>>
>>>> /* Mode (clock phase/polarity/etc.) */
>>>> @@ -2379,6 +2379,29 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
>>>> if (of_property_read_bool(nc, "spi-cs-high"))
>>>> spi->mode |= SPI_CS_HIGH;
>>>>
>>>> + rc = of_property_read_variable_u32_array(nc, "spi-buses", buses, 1,
>>>> + ARRAY_SIZE(buses));
>>>> + if (rc < 0 && rc != -EINVAL) {
>>>> + dev_err(&ctlr->dev, "%pOF has invalid 'spi-buses' property (%d)\n",
>>>> + nc, rc);
>>>> + return rc;
>>>> + }
>>>> +
>>>> + if (rc == -EINVAL) {
>>>> + /* Default when property is omitted. */
>>>> + spi->buses = BIT(0);
>>>
>>> For backwards compatibility, the default bus for CS 1 on gqspi must be 1
>>> and not 0. Ideally there would be some hook for the master to fix things
>>> up when the slaves are probed, but that doesn't seem to exist. I was
>>> thinking about doing this with OF changesets. Do you have any better
>>> ideas?
>>>
>>
>> Does this work?
>>
>> spi->buses = BIT(cs[0]);
>>
>> (would have to move all the new code after cs[0] is assigned of course)
>
> Yeah, but do we really want to make this the default for all drivers?
> This is really a quirk of the existing gqspi binding and I don't think
> it makes sense in general.
I think I will add a flag like
/* Default when property is omitted. */
if (ctlr->flags & SPI_CONTROLLER_DEFAULT_BUS_IS_CS)
spi->buses = BIT(cs[0]);
else
spi->buses = BIT(0);
which should keep the defaults sane for everyone else.
--Sean
next prev parent reply other threads:[~2025-06-13 16:44 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-16 23:21 [PATCH 0/7] spi: zynqmp-gqspi: Split the bus and add GPIO support Sean Anderson
2025-01-16 23:21 ` [PATCH 1/7] dt-bindings: spi: zynqmp-qspi: Split the bus Sean Anderson
2025-01-22 0:16 ` David Lechner
2025-01-23 16:24 ` Sean Anderson
2025-01-23 21:59 ` David Lechner
2025-01-23 22:37 ` Sean Anderson
2025-01-24 13:35 ` Mark Brown
2025-06-12 23:44 ` Sean Anderson
2025-06-13 14:20 ` David Lechner
2025-06-13 15:57 ` Sean Anderson
2025-06-13 16:44 ` Sean Anderson [this message]
2025-06-13 16:53 ` David Lechner
2025-01-16 23:21 ` [PATCH 7/7] ARM64: xilinx: zynqmp: Convert to split QSPI bus Sean Anderson
2025-01-16 23:24 ` [PATCH 0/7] spi: zynqmp-gqspi: Split the bus and add GPIO support Sean Anderson
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