[PATCH] ARM: dts: at91: sama5d2: Fix PMERRLOC resource size

[PATCH] ARM: dts: at91: sama5d2: Fix PMERRLOC resource size

[Tudor Ambarus]

PMERRLOC resource size has been shrunk to 0x100, which resulted in
HSMC_ERRLOCx register being truncated to offset x = 21, causing
error correction to fail if more than 22 bit errors where 24 or
32 bit error correction was supported.

Fixes: d9c41bf30cf8 ("ARM: dts: at91: Declare EBI/NAND controllers")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 801969c113d6..de88eb484718 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -413,7 +413,7 @@ hsmc: hsmc@f8014000 {
 				pmecc: ecc-engine@f8014070 {
 					compatible = "atmel,sama5d2-pmecc";
 					reg = <0xf8014070 0x490>,
-					      <0xf8014500 0x100>;
+					      <0xf8014500 0x200>;
 				};
 			};
 
-- 
2.25.1

Re: [PATCH] ARM: dts: at91: sama5d2: Fix PMERRLOC resource size

[Alexander Dahl]

Hello,

Am Tue, Jan 11, 2022 at 10:09:33AM +0200 schrieb Tudor Ambarus:
> PMERRLOC resource size has been shrunk to 0x100, 

What do mean with "has been shrunk"? It was introduced like this for
sama5d2, sama5d3, and sama5d4 in the first place with d9c41bf30cf8c.

FWIW, I had a look in the sama5d2, sama5d3 and sama5d4 series
datasheets, and it seems sama5d2 differs from the two others here.

> which resulted in
> HSMC_ERRLOCx register being truncated to offset x = 21, causing
> error correction to fail if more than 22 bit errors where 24 or
> 32 bit error correction was supported.
> 
> Fixes: d9c41bf30cf8 ("ARM: dts: at91: Declare EBI/NAND controllers")

This landed in 4.13. Is this fix needed for stable then? That would be
4.14, 4.19, 5.4, 5.10, and 5.15, right? Or is this covered by the
fixes tag already?

Greets
Alex

> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
>  arch/arm/boot/dts/sama5d2.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> index 801969c113d6..de88eb484718 100644
> --- a/arch/arm/boot/dts/sama5d2.dtsi
> +++ b/arch/arm/boot/dts/sama5d2.dtsi
> @@ -413,7 +413,7 @@ hsmc: hsmc@f8014000 {
>  				pmecc: ecc-engine@f8014070 {
>  					compatible = "atmel,sama5d2-pmecc";
>  					reg = <0xf8014070 0x490>,
> -					      <0xf8014500 0x100>;
> +					      <0xf8014500 0x200>;
>  				};
>  			};
>  
> -- 
> 2.25.1
> 

Re: [PATCH] ARM: dts: at91: sama5d2: Fix PMERRLOC resource size

[Tudor.Ambarus]

On 1/11/22 11:14 AM, Alexander Dahl wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hello,

Hi!

> 
> Am Tue, Jan 11, 2022 at 10:09:33AM +0200 schrieb Tudor Ambarus:
>> PMERRLOC resource size has been shrunk to 0x100,
> 
> What do mean with "has been shrunk"? It was introduced like this for
> sama5d2, sama5d3, and sama5d4 in the first place with d9c41bf30cf8c.

I meant has been shrunk until now.
I will reword this for better clarity, maybe s/"has been shrunk"/"was set".

> 
> FWIW, I had a look in the sama5d2, sama5d3 and sama5d4 series
> datasheets, and it seems sama5d2 differs from the two others here.

Indeed, this patch is for sama5d2 only. sama5d3 and sama5d4 PMERRLOC
registers fit in the 0x100 size, there's no need to update them.

> 
>> which resulted in
>> HSMC_ERRLOCx register being truncated to offset x = 21, causing
>> error correction to fail if more than 22 bit errors where 24 or
>> 32 bit error correction was supported.
>>
>> Fixes: d9c41bf30cf8 ("ARM: dts: at91: Declare EBI/NAND controllers")
> 
> This landed in 4.13. Is this fix needed for stable then? That would be
> 4.14, 4.19, 5.4, 5.10, and 5.15, right? Or is this covered by the
> fixes tag already?

Maybe indirectly. But best would be to add the following line according to
https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html

Cc: <stable@vger.kernel.org> # 4.14.x
Will add it. Cheers,
ta