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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id g22-20020a19e056000000b00492eb7205b0sm403152lfj.210.2022.09.30.13.01.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Sep 2022 13:01:46 -0700 (PDT) Message-ID: <1c14b73b-46fb-29e8-0fd6-1fd4d8706cbd@linaro.org> Date: Fri, 30 Sep 2022 22:01:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 Subject: Re: [PATCH v6 2/2] dt-bindings: memory-controllers: gpmc-child: add wait-pin polarity To: Rob Herring , "B. Niedermayr" Cc: devicetree@vger.kernel.org, linux-omap@vger.kernel.org, rogerq@kernel.org, tony@atomide.com References: <20220929125639.143953-1-benedikt.niedermayr@siemens.com> <20220929125639.143953-3-benedikt.niedermayr@siemens.com> <20220930194257.GA756240-robh@kernel.org> Content-Language: en-US From: Krzysztof Kozlowski In-Reply-To: <20220930194257.GA756240-robh@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 30/09/2022 21:42, Rob Herring wrote: > On Thu, Sep 29, 2022 at 02:56:39PM +0200, B. Niedermayr wrote: >> From: Benedikt Niedermayr >> >> The GPMC controller has the ability to configure the polarity for the >> wait pin. The current properties do not allow this configuration. >> This binding directly configures the WAITPINPOLARITY bit >> in the GPMC_CONFIG register by setting the gpmc,wait-pin-polarity >> dt-property. >> >> Signed-off-by: Benedikt Niedermayr >> --- >> .../bindings/memory-controllers/ti,gpmc-child.yaml | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml >> index 6e3995bb1630..477189973334 100644 >> --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml >> +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml >> @@ -230,6 +230,13 @@ properties: >> Wait-pin used by client. Must be less than "gpmc,num-waitpins". >> $ref: /schemas/types.yaml#/definitions/uint32 >> >> + gpmc,wait-pin-polarity: > > 'gpmc' is not a vendor. Don't continue this bad pattern, use 'ti'. > >> + description: | >> + Set the desired polarity for the selected wait pin. >> + 1 for active low, 0 for active high. > > Well that looks backwards. I assume from the commit msg above, it's the > register value, but that's not what the description says. Please go with > the logical state here and do the inversion in the driver. This was actually my suggestion to keep the same value as ACTIVE_HIGH/LOW in standard GPIO flags. The DTS could reuse the defines. Best regards, Krzysztof