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Mon, 03 Nov 2025 06:30:20 -0800 (PST) Message-ID: <1c3712b9b5313ed6c9d07c1acbc9b918a4883056.camel@gmail.com> Subject: Re: [PATCH v6 8/8] iio: adc: ad4030: Support common-mode channels with SPI offloading From: Nuno =?ISO-8859-1?Q?S=E1?= To: Marcelo Schmitt Cc: Jonathan Cameron , Marcelo Schmitt , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, michael.hennerich@analog.com, nuno.sa@analog.com, eblanc@baylibre.com, dlechner@baylibre.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, corbet@lwn.net Date: Mon, 03 Nov 2025 14:30:56 +0000 In-Reply-To: References: <3fadbf22973098c4be9e5f0edd8c22b8b9b18ca6.1760984107.git.marcelo.schmitt@analog.com> <20251027140423.61d96e88@jic23-huawei> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Mon, 2025-11-03 at 10:22 -0300, Marcelo Schmitt wrote: > On 10/30, Nuno S=C3=A1 wrote: > > On Wed, 2025-10-29 at 15:11 -0300, Marcelo Schmitt wrote: > > > On 10/27, Jonathan Cameron wrote: > > > > On Mon, 20 Oct 2025 16:15:39 -0300 > > > > Marcelo Schmitt wrote: > > > >=20 > > > > > AD4030 and similar devices can read common-mode voltage together = with > > > > > ADC sample data. When enabled, common-mode voltage data is provid= ed in a > > > > > separate IIO channel since it measures something other than the p= rimary > > > > > ADC input signal and requires separate scaling to convert to volt= age > > > > > units. The initial SPI offload support patch for AD4030 only prov= ided > > > > > differential channels. Now, extend the AD4030 driver to also prov= ide > > > > > common-mode IIO channels when setup with SPI offloading capabilit= y. > > > > >=20 > > > > > Signed-off-by: Marcelo Schmitt > > > > > --- > > > > > New patch. > > > > > I hope this works for ADCs with two channels. It's not clear if w= orks as > > > > > expected with current HDL and single-channel ADCs (like ADAQ4216)= . > > > > >=20 > > > > > The ad4630_fmc HDL project was designed for ADCs with two channel= s and > > > > > always streams two data channels to DMA (even when the ADC has on= ly one > > > > > physical channel). Though, if the ADC has only one physical chann= el, the > > > > > data that would come from the second ADC channel comes in as nois= e and > > > > > would have to be discarded. Because of that, when using single-ch= annel > > > > > ADCs, the ADC driver would need to use a special DMA buffer to fi= lter out > > > > > half of the data that reaches DMA memory. With that, the ADC samp= le data > > > > > could be delivered to user space without any noise being added to= the IIO > > > > > buffer. I have implemented a prototype of such specialized buffer > > > > > (industrialio-buffer-dmaengine-filtered), but it is awful and onl= y worked > > > > > with CONFIG_IIO_DMA_BUF_MMAP_LEGACY (only present in ADI Linux tr= ee). Usual > > > > > differential channel data is also affected by the extra 0xFFFFFFF= F data > > > > > pushed to DMA. Though, for the differential channel, it's easier = to see it > > > > > shall work for two-channel ADCs (the sine wave appears "filled" i= n > > > > > iio-oscilloscope). > > > > >=20 > > > > > So, I sign this, but don't guarantee it to work. > > > >=20 > > > > So what's the path to resolve this?=C2=A0 Waiting on HDL changes or= not support > > > > those devices until we have a clean solution? > > >=20 > > > Waiting for HDL to get updated I'd say. > >=20 > > Agree. We kind of control the IP here so why should we do awful tricks = in > > SW right :)? At the very least I would expect hdl to be capable to disc= ard the > > data in HW. > >=20 > > >=20 > > > >=20 > > > > Also, just to check, is this only an issue with the additional stuf= f this > > > > patch adds or do we have a problem with SPI offload in general (+ t= his > > > > IP) and those single channel devices? > > >=20 > > > IMO, one solution would be to update the HDL project for AD4630 and s= imilar ADCs > > > to not send data from channel 2 to DMA memory when single-channel ADC= s are > > > connected. Another possibility would be to intercept and filter out t= he extra > > > data before pushing it to user space. My first attempt of doing that = didn't > > > work out with upstream kernel but I may revisit that. > >=20 > > I'm also confused. Is this also an issue with the current series withou= t common mode? > >=20 > > If I'm getting things right, one channel ADCs pretty much do not work r= ight now with > > spi offload? >=20 > Yes, that's correct. It kind of works for single-channel ADCs, but half o= f the > data we see in user space is valid and the other half is not. For two-cha= nnel > ADCs, everything should be fine. To me that is something that does not work eheheh :). I mean, going with al= l this trouble to sample as fast as we can just so we have to discard (or mask out) half o= f every sample in userspace (even though I can imagine we still get better performance vs = non offload case). >=20 > >=20 > > If the above is correct I would just not support it for 1 channel ADCs. >=20 > Currently, it's just one part that is single-channel (AD4030). If patches= 6 and > 7 were accepted, it would be 3 single-channel parts supported. I can add = an `if` > somewhere to check the number of channel, but it will eventually have to = be > removed when HDL gets fixed. I would probably do the above or maybe we just need to push for an hdl fix = or some final conclusion (like if they cannot fix it for some reason) and act accor= dingly. >=20 > Or, if HDL can't be fixed, then we'll need the `if` now and something els= e > latter to filter out extra data before pushing to IIO buffers as mentione= d > above. Though, this scenario seems odd to me as I think the HDL wouldn't = be 100% > compatible with single-channel AD4030-like parts. We would be writing cod= e to > support AD4030 _and_ a peculiar data stream from this specific HDL projec= t? >=20 > My suggestion is to apply all patches except patch 8. IMHO, SPI offload > single-channel ADC support is broken due to HDL IP data stream not being > compatible with single-channel parts. That's not a Linux driver issue. Well, it's not a SW issue but we are driving the HW and we know it's broken= so I don't see a point in having something that does not work. Given that this i= s so connected to the HDL part of it I'm not sure it's fine to ignore that offlo= ad does not work for 1 channel parts.=20 Anyways, it's odd to me but ultimately if Jonathan is fine with it, I won't= object :) - Nuno S=C3=A1