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From: Michal Simek <michal.simek@xilinx.com>
To: Kalyani Akula <kalyani.akula@xilinx.com>,
	herbert@gondor.apana.org.au, davem@davemloft.net,
	monstr@seznam.cz, linux-crypto@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, git-dev <git-dev@xilinx.com>,
	Mohan Marutirao Dhanawade <mohand@xilinx.com>,
	Sarat Chand Savitala <saratcha@xilinx.com>,
	Harsh Jain <harshj@xilinx.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Kalyani Akula <kalyania@xilinx.com>
Subject: Re: [PATCH V5 2/4] dt-bindings: crypto: Add bindings for ZynqMP AES-GCM driver
Date: Thu, 23 Jan 2020 13:07:41 +0100	[thread overview]
Message-ID: <1c5eda42-b28c-ea98-048b-77a94c8da545@xilinx.com> (raw)
In-Reply-To: <1579777877-10553-3-git-send-email-kalyani.akula@xilinx.com>

On 23. 01. 20 12:11, Kalyani Akula wrote:
> Add documentation to describe Xilinx ZynqMP AES-GCM driver bindings.
> 
> Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com>
> ---
> 
> V5 Changes:
> - Moved dt-bindings patch from 1/4 to 2/4
> - Converted dt-bindings from .txt to .yaml format.
> 
>  .../bindings/crypto/xlnx,zynqmp-aes.yaml           | 37 ++++++++++++++++++++++
>  1 file changed, 37 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml
> 
> diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml
> new file mode 100644
> index 0000000..b2bca4b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml
> @@ -0,0 +1,37 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-aes.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx ZynqMP AES-GCM Hardware Accelerator Device Tree Bindings
> +
> +maintainers:
> +  - Kalyani Akula <kalyani.akula@xilinx.com>
> +  - Michal Simek <michal.simek@xilinx.com>
> +
> +description: |
> +  The ZynqMP AES-GCM hardened cryptographic accelerator is used to
> +  encrypt or decrypt the data with provided key and initialization vector.
> +
> +properties:
> +  compatible:
> +    const: xlnx,zynqmp-aes
> +
> +required:
> +  - compatible
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    firmware {
> +      zynqmp_firmware: zynqmp-firmware {
> +        compatible = "xlnx,zynqmp-firmware";
> +        method = "smc";
> +        xlnx_aes: zynqmp-aes {
> +          compatible = "xlnx,zynqmp-aes";
> +        };
> +      };
> +    };
> +...
> 

Rob: dtbs_check looks good to me. This binding is aligned with other
clock, reset, pl binding coming to this node that's why

Acked-by: Michal Simek <michal.simek@xilinx.com>

Thanks,
Michal


  reply	other threads:[~2020-01-23 12:08 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-23 11:11 [PATCH V5 0/4] Add Xilinx's ZynqMP AES-GCM driver support Kalyani Akula
2020-01-23 11:11 ` [PATCH V5 1/4] firmware: xilinx: Add ZynqMP aes API for AES functionality Kalyani Akula
2020-01-23 12:06   ` Michal Simek
2020-01-23 11:11 ` [PATCH V5 2/4] dt-bindings: crypto: Add bindings for ZynqMP AES-GCM driver Kalyani Akula
2020-01-23 12:07   ` Michal Simek [this message]
2020-01-27 15:50   ` Rob Herring
2020-01-23 11:11 ` [PATCH V5 3/4] crypto: Add Xilinx AES driver Kalyani Akula
2020-01-23 12:10   ` Michal Simek
2020-01-23 11:11 ` [PATCH V5 4/4] arm64: zynqmp: Add Xilinx AES node Kalyani Akula
2020-01-23 12:08   ` Michal Simek

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