* [PATCH v9 6/7] dt-bindings: phy-qcom-qmp: Add UFS phy compatible string for sdm845 [not found] <1537504081-29976-1-git-send-email-quic_cang@quicinc.com> @ 2018-09-21 4:27 ` Can Guo 2018-09-21 4:28 ` [PATCH v9 7/7] dt-bindings: ufshcd-pltfrm: Add core reset string Can Guo 1 sibling, 0 replies; 4+ messages in thread From: Can Guo @ 2018-09-21 4:27 UTC (permalink / raw) To: subhashj, asutoshd, vivek.gautam, evgreen, rnayak, vinholikatti, jejb, martin.petersen Cc: Can Guo, Rob Herring, Mark Rutland, Manu Gautam, Kishon Vijay Abraham I, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, open list From: Can Guo <cang@codeaurora.org> Update the compatible string for UFS QMP PHY on SDM845. Signed-off-by: Can Guo <cang@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> --- Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt index cef8765..930d94c 100644 --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt @@ -11,7 +11,8 @@ Required properties: "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996, "qcom,qmp-v3-usb3-phy" for USB3 QMP V3 phy, "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845, - "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845. + "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845, + "qcom,sdm845-qmp-ufs-phy" for UFS QMP phy on sdm845. - reg: offset and length of register set for PHY's common serdes block. @@ -29,6 +30,7 @@ Required properties: "aux" for phy aux clock, "ref" for 19.2 MHz ref clk, "com_aux" for phy common block aux clock, + "ref_aux" for phy reference aux clock, For "qcom,msm8996-qmp-pcie-phy" must contain: "aux", "cfg_ahb", "ref". For "qcom,msm8996-qmp-usb3-phy" must contain: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v9 7/7] dt-bindings: ufshcd-pltfrm: Add core reset string [not found] <1537504081-29976-1-git-send-email-quic_cang@quicinc.com> 2018-09-21 4:27 ` [PATCH v9 6/7] dt-bindings: phy-qcom-qmp: Add UFS phy compatible string for sdm845 Can Guo @ 2018-09-21 4:28 ` Can Guo 2018-09-27 15:06 ` Rob Herring 1 sibling, 1 reply; 4+ messages in thread From: Can Guo @ 2018-09-21 4:28 UTC (permalink / raw) To: subhashj, asutoshd, vivek.gautam, evgreen, rnayak, vinholikatti, jejb, martin.petersen Cc: Can Guo, Amit Nischal, Rob Herring, Mark Rutland, Mathieu Malaterre, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, open list From: Can Guo <cang@codeaurora.org> Add core reset support string for UFS. Signed-off-by: Amit Nischal <anischal@codeaurora.org> Signed-off-by: Can Guo <cang@codeaurora.org> --- Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt index c39dfef..6b697c4 100644 --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt @@ -11,6 +11,11 @@ Required properties: "qcom,ufshc" - interrupts : <interrupt mapping for UFS host controller IRQ> - reg : <registers mapping> +- reset : reset specifier pair consists of phandle for the reset provider + and reset lines used by this controller. It is mandatory for + QCOM SDM845 platform. +- reset-names : reset signal name strings sorted in the same order as the + resets property. It is mandatory for QCOM SDM845 platform. Optional properties: - phys : phandle to UFS PHY node @@ -64,6 +69,8 @@ Example: clocks = <&core 0>, <&ref 0>, <&iface 0>; clock-names = "core_clk", "ref_clk", "iface_clk"; freq-table-hz = <100000000 200000000>, <0 0>, <0 0>; + resets = <clock_gcc GCC_UFS_BCR>; + reset-names = "core_reset"; phys = <&ufsphy1>; phy-names = "ufsphy"; }; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v9 7/7] dt-bindings: ufshcd-pltfrm: Add core reset string 2018-09-21 4:28 ` [PATCH v9 7/7] dt-bindings: ufshcd-pltfrm: Add core reset string Can Guo @ 2018-09-27 15:06 ` Rob Herring 2018-10-08 7:32 ` cang 0 siblings, 1 reply; 4+ messages in thread From: Rob Herring @ 2018-09-27 15:06 UTC (permalink / raw) To: Can Guo Cc: subhashj, asutoshd, vivek.gautam, evgreen, rnayak, vinholikatti, jejb, martin.petersen, Can Guo, Amit Nischal, Mark Rutland, Mathieu Malaterre, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, open list On Thu, Sep 20, 2018 at 09:28:00PM -0700, Can Guo wrote: > From: Can Guo <cang@codeaurora.org> > > Add core reset support string for UFS. > > Signed-off-by: Amit Nischal <anischal@codeaurora.org> > Signed-off-by: Can Guo <cang@codeaurora.org> > --- > Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt > index c39dfef..6b697c4 100644 > --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt > +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt > @@ -11,6 +11,11 @@ Required properties: > "qcom,ufshc" > - interrupts : <interrupt mapping for UFS host controller IRQ> > - reg : <registers mapping> > +- reset : reset specifier pair consists of phandle for the reset provider > + and reset lines used by this controller. It is mandatory for > + QCOM SDM845 platform. > +- reset-names : reset signal name strings sorted in the same order as the > + resets property. It is mandatory for QCOM SDM845 platform. This already exists as of 4.19 under optional properties. (And you can't add new required properties anyways.) > > Optional properties: > - phys : phandle to UFS PHY node > @@ -64,6 +69,8 @@ Example: > clocks = <&core 0>, <&ref 0>, <&iface 0>; > clock-names = "core_clk", "ref_clk", "iface_clk"; > freq-table-hz = <100000000 200000000>, <0 0>, <0 0>; > + resets = <clock_gcc GCC_UFS_BCR>; > + reset-names = "core_reset"; And the name should be "rst" (or omitted). > phys = <&ufsphy1>; > phy-names = "ufsphy"; > }; > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project > ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v9 7/7] dt-bindings: ufshcd-pltfrm: Add core reset string 2018-09-27 15:06 ` Rob Herring @ 2018-10-08 7:32 ` cang 0 siblings, 0 replies; 4+ messages in thread From: cang @ 2018-10-08 7:32 UTC (permalink / raw) To: Rob Herring Cc: Can Guo, subhashj, asutoshd, vivek.gautam, evgreen, rnayak, vinholikatti, jejb, martin.petersen, Amit Nischal, Mark Rutland, Mathieu Malaterre, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, open list On 2018-09-27 23:06, Rob Herring wrote: > On Thu, Sep 20, 2018 at 09:28:00PM -0700, Can Guo wrote: >> From: Can Guo <cang@codeaurora.org> >> >> Add core reset support string for UFS. >> >> Signed-off-by: Amit Nischal <anischal@codeaurora.org> >> Signed-off-by: Can Guo <cang@codeaurora.org> >> --- >> Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt >> b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt >> index c39dfef..6b697c4 100644 >> --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt >> +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt >> @@ -11,6 +11,11 @@ Required properties: >> "qcom,ufshc" >> - interrupts : <interrupt mapping for UFS host controller IRQ> >> - reg : <registers mapping> >> +- reset : reset specifier pair consists of phandle for >> the reset provider >> + and reset lines used by this controller. It is >> mandatory for >> + QCOM SDM845 platform. >> +- reset-names : reset signal name strings sorted in the same >> order as the >> + resets property. It is mandatory for QCOM SDM845 platform. > > This already exists as of 4.19 under optional properties. (And you > can't > add new required properties anyways.) > Thank you Rob, I also found the newly merged change from Huawei on 4.19. Then our code would need a small change to parse the new reset-names string. >> >> Optional properties: >> - phys : phandle to UFS PHY node >> @@ -64,6 +69,8 @@ Example: >> clocks = <&core 0>, <&ref 0>, <&iface 0>; >> clock-names = "core_clk", "ref_clk", "iface_clk"; >> freq-table-hz = <100000000 200000000>, <0 0>, <0 0>; >> + resets = <clock_gcc GCC_UFS_BCR>; >> + reset-names = "core_reset"; > > And the name should be "rst" (or omitted). > Sure, got it, thank you. >> phys = <&ufsphy1>; >> phy-names = "ufsphy"; >> }; >> -- >> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora >> Forum, >> a Linux Foundation Collaborative Project >> ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-10-08 7:32 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
[not found] <1537504081-29976-1-git-send-email-quic_cang@quicinc.com>
2018-09-21 4:27 ` [PATCH v9 6/7] dt-bindings: phy-qcom-qmp: Add UFS phy compatible string for sdm845 Can Guo
2018-09-21 4:28 ` [PATCH v9 7/7] dt-bindings: ufshcd-pltfrm: Add core reset string Can Guo
2018-09-27 15:06 ` Rob Herring
2018-10-08 7:32 ` cang
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).