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([2a02:810d:15c0:828:848a:1971:93e0:b465]) by smtp.gmail.com with ESMTPSA id c14-20020a509f8e000000b005003fd12eafsm654272edf.63.2023.03.17.01.37.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 17 Mar 2023 01:37:22 -0700 (PDT) Message-ID: <1d0c894b-ccd4-348f-0c48-c6a5c89df27d@linaro.org> Date: Fri, 17 Mar 2023 09:37:21 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH 1/5] dt-bindings: clock: qcom,gpucc: Fix SM6350 clock names Content-Language: en-US To: Konrad Dybcio , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno Cc: Marijn Suijten , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org> <20230315-topic-lagoon_gpu-v1-1-a74cbec4ecfc@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <20230315-topic-lagoon_gpu-v1-1-a74cbec4ecfc@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 16/03/2023 12:16, Konrad Dybcio wrote: > SM6350 GPUCC uses the same clock names as the rest of the gang, except > without a _src suffix. Account for that. Why not fixing the names instead (to use the same)? If the clocks are the same, why using different names for the inputs? To remind - these are not names of clocks in GCC, but names of clock inputs to the device. > > Fixes: 7b91b9d8cc6c ("dt-bindings: clock: add SM6350 QCOM Graphics clock bindings") > Signed-off-by: Konrad Dybcio > --- > .../devicetree/bindings/clock/qcom,gpucc.yaml | 29 +++++++++++++++++++--- > 1 file changed, 25 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > index db53eb288995..d209060a619d 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > @@ -43,10 +43,8 @@ properties: > - description: GPLL0 div branch source > > clock-names: > - items: > - - const: bi_tcxo > - - const: gcc_gpu_gpll0_clk_src > - - const: gcc_gpu_gpll0_div_clk_src > + minItems: 3 Drop minItems, not needed as it is implied by maxItems. > + maxItems: 3 > > '#clock-cells': > const: 1 > @@ -71,6 +69,29 @@ required: > > additionalProperties: false > > Best regards, Krzysztof