From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8400DC433FE for ; Wed, 16 Nov 2022 10:30:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231794AbiKPKar (ORCPT ); Wed, 16 Nov 2022 05:30:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230142AbiKPKaO (ORCPT ); Wed, 16 Nov 2022 05:30:14 -0500 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C7A7D117C for ; Wed, 16 Nov 2022 02:26:55 -0800 (PST) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2AGAQmXE047760; Wed, 16 Nov 2022 04:26:48 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1668594408; bh=jClSXlVOw1pLKJYmkJUIYTHDz6gocU+BCNRujBuVklw=; h=Date:CC:Subject:To:References:From:In-Reply-To; b=NgoK5yQwxxgiHqk1tvKAD8+50Mr2InyLIwOqWgXXpcf0YHt/215+GNeS7vmyKiTSR CMth74Uc1n7gpM1jMmY2m1ZMEiiCu+M6jgy5+hzc0Dw0IpsTV3nb6CbcfrFhuQJI6O YLbC8p46HieXZWjzfSy9EFKBTMqctu3Ebx/tKEo8= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2AGAQmtv008380 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 16 Nov 2022 04:26:48 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 16 Nov 2022 04:26:48 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 16 Nov 2022 04:26:48 -0600 Received: from [172.24.145.61] (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2AGAQjqQ087564; Wed, 16 Nov 2022 04:26:45 -0600 Message-ID: <1d7eb5dc-701b-5830-37ac-1dcd6091f835@ti.com> Date: Wed, 16 Nov 2022 15:56:44 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 CC: , , Subject: Re: [PATCH v5 8/8] arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe Content-Language: en-US To: Matt Ranostay , , , , , References: <20221103044125.172864-1-mranostay@ti.com> <20221103044125.172864-9-mranostay@ti.com> From: Siddharth Vadapalli In-Reply-To: <20221103044125.172864-9-mranostay@ti.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 03/11/22 10:11, Matt Ranostay wrote: > From: Aswath Govindraju > > x1 lane PCIe slot in the common processor board is enabled and connected to > J721S2 SOM. Add PCIe DT node in common processor board to reflect the > same. > > Signed-off-by: Aswath Govindraju > Signed-off-by: Vignesh Raghavendra > Signed-off-by: Matt Ranostay > --- > .../boot/dts/ti/k3-j721s2-common-proc-board.dts | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) Reviewed-by: Siddharth Vadapalli