[PATCH 0/2] arm64: qcom: Add BWMON support for SA8775p

[PATCH 0/2] arm64: qcom: Add BWMON support for SA8775p

[Tengfei Fan]

Add CPU and LLCC BWMON nodes and their corresponding OPP tables for
SA8775p SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
Tengfei Fan (2):
      dt-bindings: interconnect: qcom-bwmon: Document SA8775p bwmon compatibles
      arm64: dts: qcom: sa8775p: Add CPU and LLCC BWMON

 .../bindings/interconnect/qcom,msm8998-bwmon.yaml  |  2 +
 arch/arm64/boot/dts/qcom/sa8775p.dtsi              | 95 ++++++++++++++++++++++
 2 files changed, 97 insertions(+)
---
base-commit: 931a3b3bccc96e7708c82b30b2b5fa82dfd04890
change-id: 20240730-add_sa8775p_bwmon-b9aeb05cb3d0

Best regards,
-- 
Tengfei Fan <quic_tengfan@quicinc.com>

[PATCH 1/2] dt-bindings: interconnect: qcom-bwmon: Document SA8775p bwmon compatibles

[Tengfei Fan]

Document the compatibles used to describe the bwmons present on the
SA8775p platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
index 2cd1f5590fd9..189f5900ee50 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
@@ -26,6 +26,7 @@ properties:
       - items:
           - enum:
               - qcom,qcm2290-cpu-bwmon
+              - qcom,sa8775p-cpu-bwmon
               - qcom,sc7180-cpu-bwmon
               - qcom,sc7280-cpu-bwmon
               - qcom,sc8280xp-cpu-bwmon
@@ -39,6 +40,7 @@ properties:
           - const: qcom,sdm845-bwmon    # BWMON v4, unified register space
       - items:
           - enum:
+              - qcom,sa8775p-llcc-bwmon
               - qcom,sc7180-llcc-bwmon
               - qcom,sc8280xp-llcc-bwmon
               - qcom,sm6350-cpu-bwmon

-- 
2.25.1

[PATCH 2/2] arm64: dts: qcom: sa8775p: Add CPU and LLCC BWMON

[Tengfei Fan]

Add CPU and LLCC BWMON nodes and their corresponding opp tables for
SA8775p SoC.
SA8775p has two cpu clusters, with each cluster having a set of
CPU-to-LLCC BWMON registers. Consequently, there are two sets of
CPU-to-LLCC registers.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 95 +++++++++++++++++++++++++++++++++++
 1 file changed, 95 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 23f1b2e5e624..de88894a7a0d 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -2892,6 +2892,101 @@ serdes1: phy@8902000 {
 			status = "disabled";
 		};
 
+		pmu@9091000 {
+			compatible = "qcom,sa8775p-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
+			reg = <0x0 0x9091000 0x0 0x1000>;
+			interrupts = <GIC_SPI 620 IRQ_TYPE_LEVEL_HIGH>;
+			interconnects = <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
+					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+			operating-points-v2 = <&llcc_bwmon_opp_table>;
+
+			llcc_bwmon_opp_table: opp-table {
+				compatible = "operating-points-v2";
+
+				opp-0 {
+					opp-peak-kBps = <762000>;
+				};
+
+				opp-1 {
+					opp-peak-kBps = <1720000>;
+				};
+
+				opp-2 {
+					opp-peak-kBps = <2086000>;
+				};
+
+				opp-3 {
+					opp-peak-kBps = <2601000>;
+				};
+
+				opp-4 {
+					opp-peak-kBps = <2929000>;
+				};
+
+				opp-5 {
+					opp-peak-kBps = <5931000>;
+				};
+
+				opp-6 {
+					opp-peak-kBps = <6515000>;
+				};
+
+				opp-7 {
+					opp-peak-kBps = <7984000>;
+				};
+
+				opp-8 {
+					opp-peak-kBps = <10437000>;
+				};
+
+				opp-9 {
+					opp-peak-kBps = <12195000>;
+				};
+			};
+		};
+
+		pmu@90b5400 {
+			compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
+			reg = <0x0 0x90b5400 0x0 0x600>;
+			interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+					 &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+			operating-points-v2 = <&cpu_bwmon_opp_table>;
+
+			cpu_bwmon_opp_table: opp-table {
+				compatible = "operating-points-v2";
+
+				opp-0 {
+					opp-peak-kBps = <9155000>;
+				};
+
+				opp-1 {
+					opp-peak-kBps = <12298000>;
+				};
+
+				opp-2 {
+					opp-peak-kBps = <14236000>;
+				};
+
+				opp-3 {
+					opp-peak-kBps = <16265000>;
+				};
+			};
+
+		};
+
+		pmu@90b6400 {
+			compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
+			reg = <0x0 0x90b6400 0x0 0x600>;
+			interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+					 &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+			operating-points-v2 = <&cpu_bwmon_opp_table>;
+		};
+
 		llcc: system-cache-controller@9200000 {
 			compatible = "qcom,sa8775p-llcc";
 			reg = <0x0 0x09200000 0x0 0x80000>,

-- 
2.25.1

Re: [PATCH 1/2] dt-bindings: interconnect: qcom-bwmon: Document SA8775p bwmon compatibles

[Krzysztof Kozlowski]

On 30/07/2024 09:16, Tengfei Fan wrote:
> Document the compatibles used to describe the bwmons present on the
> SA8775p platform.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 2 ++
>  1 file changed, 2 insertions(+)

I admit I don't know what to do with all these sa8775p patches. I am
afraid now you say these are valid but in half a year this will change.
If I give Ack, I feel like I am agreeing to such approach, which I do not.

Best regards,
Krzysztof

Re: [PATCH 1/2] dt-bindings: interconnect: qcom-bwmon: Document SA8775p bwmon compatibles

[Trilok Soni]

On 7/31/2024 2:23 AM, Krzysztof Kozlowski wrote:
> On 30/07/2024 09:16, Tengfei Fan wrote:
>> Document the compatibles used to describe the bwmons present on the
>> SA8775p platform.
>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>  Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 2 ++
>>  1 file changed, 2 insertions(+)
> 
> I admit I don't know what to do with all these sa8775p patches. I am
> afraid now you say these are valid but in half a year this will change.
> If I give Ack, I feel like I am agreeing to such approach, which I do not.

Are you referring to sa8775p moving to scmi later in the year? sa8755p will not move to scmi
as per the latest discussions. We will have another SOC SKU to start adding
the SCMI. 


-- 
---Trilok Soni

Re: [PATCH 1/2] dt-bindings: interconnect: qcom-bwmon: Document SA8775p bwmon compatibles

[Krzysztof Kozlowski]

On 31/07/2024 21:30, Trilok Soni wrote:
> On 7/31/2024 2:23 AM, Krzysztof Kozlowski wrote:
>> On 30/07/2024 09:16, Tengfei Fan wrote:
>>> Document the compatibles used to describe the bwmons present on the
>>> SA8775p platform.
>>>
>>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>>> ---
>>>  Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 2 ++
>>>  1 file changed, 2 insertions(+)
>>
>> I admit I don't know what to do with all these sa8775p patches. I am
>> afraid now you say these are valid but in half a year this will change.
>> If I give Ack, I feel like I am agreeing to such approach, which I do not.
> 
> Are you referring to sa8775p moving to scmi later in the year? sa8755p will not move to scmi
> as per the latest discussions. We will have another SOC SKU to start adding
> the SCMI. 

Yeah, thanks for clarification.

Best regards,
Krzysztof

Re: (subset) [PATCH 0/2] arm64: qcom: Add BWMON support for SA8775p

[Bjorn Andersson]

On Tue, 30 Jul 2024 15:16:09 +0800, Tengfei Fan wrote:
> Add CPU and LLCC BWMON nodes and their corresponding OPP tables for
> SA8775p SoC.
> 
> 

Applied, thanks!

[2/2] arm64: dts: qcom: sa8775p: Add CPU and LLCC BWMON
      commit: 1dd1a6d2b1851f8908643343c4e714af2e48352d

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>