From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5ED6CC77B62 for ; Mon, 3 Apr 2023 07:48:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231320AbjDCHsB (ORCPT ); Mon, 3 Apr 2023 03:48:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41266 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229509AbjDCHsA (ORCPT ); Mon, 3 Apr 2023 03:48:00 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DA6C1FF5; Mon, 3 Apr 2023 00:47:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1680508076; x=1712044076; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=zGqIFvsIBpWbq/uZw0Ixb3JhhlFXJPObQzt1HnJSOpc=; b=Y0f3ldBp0OyrL74hEPh0T7eYh3iISzcg+FiP9czbESDeGAFd1Vpabnki sXa9499GpThQDnat8a+ovFGGUN4eH8zgyEEDwQE9JKBriN2OK5yfGT8Kp tn05RtUTM0V2VmjSHEqi7IEgE/deOnNIAsVZH6IB+tyIuV07lnii6VYU7 r+NUbqeHkUqS99+0bg37aOMneSCeRB9hj+QDeb29MXu1oUrS3RabRuAgw FSHXIxy1QsYAJytwiPKezNWL31I7Fk6nM4oTeCcvcPpXsPB556EPxuLSr BPvoYjGuIZz4sbaCwiINOt0i2HczoocNX2fnKykgH9jlscox6GNiHlDyx w==; X-IronPort-AV: E=Sophos;i="5.98,314,1673938800"; d="asc'?scan'208";a="145174505" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Apr 2023 00:47:54 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Mon, 3 Apr 2023 00:47:53 -0700 Received: from wendy (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21 via Frontend Transport; Mon, 3 Apr 2023 00:47:50 -0700 Date: Mon, 3 Apr 2023 08:47:35 +0100 From: Conor Dooley To: Hal Feng CC: Conor Dooley , , , , Stephen Boyd , Michael Turquette , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Albert Ou , Ben Dooks , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , Emil Renner Berthing , Subject: Re: [PATCH v7 00/22] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC Message-ID: <1eda304a-a8e0-4f19-bfe4-8793052f73a9@spud> References: <20230401111934.130844-1-hal.feng@starfivetech.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="QEXRWawa+Yd/Oc16" Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org --QEXRWawa+Yd/Oc16 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Apr 03, 2023 at 03:30:32PM +0800, Hal Feng wrote: > On Sun, 2 Apr 2023 20:19:41 +0100, Conor Dooley wrote: > > On Sat, Apr 01, 2023 at 07:19:12PM +0800, Hal Feng wrote: > > And the rest as riscv-jh7110_clk_reset: > > MAINTAINERS: generalise StarFive clk/reset entries >=20 > For this patch, I find something to improve. > 1. Could you please help me sort the StarFive entries in MAINTAINERS? > "STARFIVE JH71X0 CLOCK DRIVERS" should be added after > "STARFIVE JH7110 MMC/SD/SDIO DRIVER". >=20 > 2. A "S" should be added at the end of > "STARFIVE JH7100 RESET CONTROLLER DRIVER". >=20 > I have tested your branch and have no comments on the other patches. Done: diff --git a/MAINTAINERS b/MAINTAINERS index f405114bf096..0a701632b0b5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19907,6 +19907,12 @@ M: Emil Renner Berthing S: Maintained F: arch/riscv/boot/dts/starfive/ =20 +STARFIVE JH7110 MMC/SD/SDIO DRIVER +M: William Qiu +S: Supported +F: Documentation/devicetree/bindings/mmc/starfive* +F: drivers/mmc/host/dw_mmc-starfive.c + STARFIVE JH71X0 CLOCK DRIVERS M: Emil Renner Berthing M: Hal Feng @@ -19915,12 +19921,6 @@ F: Documentation/devicetree/bindings/clock/sta= rfive,jh71*.yaml F: drivers/clk/starfive/clk-starfive-jh71* F: include/dt-bindings/clock/starfive?jh71*.h =20 -STARFIVE JH7110 MMC/SD/SDIO DRIVER -M: William Qiu -S: Supported -F: Documentation/devicetree/bindings/mmc/starfive* -F: drivers/mmc/host/dw_mmc-starfive.c - STARFIVE JH71X0 PINCTRL DRIVERS M: Emil Renner Berthing M: Jianlong Huang @@ -19931,7 +19931,7 @@ F: drivers/pinctrl/starfive/pinctrl-starfive-j= h71* F: include/dt-bindings/pinctrl/pinctrl-starfive-jh7100.h F: include/dt-bindings/pinctrl/starfive,jh7110-pinctrl.h =20 -STARFIVE JH71X0 RESET CONTROLLER DRIVER +STARFIVE JH71X0 RESET CONTROLLER DRIVERS M: Emil Renner Berthing M: Hal Feng S: Maintained Cheers, Conor. --QEXRWawa+Yd/Oc16 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZCqElwAKCRB4tDGHoIJi 0sqbAQCMsACpQzkzhLoKfCAGm331fVF+ABaBHJYSyLnVCVgBVAEAmAp9CCOzimm4 keaJvJy+j9w82evuGi+U1ktFrXhXDQs= =7zTB -----END PGP SIGNATURE----- --QEXRWawa+Yd/Oc16--