* [PATCH] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node
@ 2022-06-23 2:42 niravkumar.l.rabara
2022-06-23 16:16 ` Dinh Nguyen
0 siblings, 1 reply; 8+ messages in thread
From: niravkumar.l.rabara @ 2022-06-23 2:42 UTC (permalink / raw)
To: dinguyen, robh+dt, krzysztof.kozlowski+dt, devicetree,
linux-kernel, niravkumar.l.rabara
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
The clocks are not part of the SoC but provided on the board
(external oscillators). Moving them out of soc node.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
.../boot/dts/altera/socfpga_stratix10.dtsi | 56 +++++++++----------
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index aa2bba75265f..5c7d926d18f7 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -97,6 +97,34 @@ intc: interrupt-controller@fffc1000 {
<0x0 0xfffc6000 0x0 0x2000>;
};
+ clocks {
+ cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ cb_intosc_ls_clk: cb-intosc-ls-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ f2s_free_clk: f2s-free-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ osc1: osc1 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ qspi_clk: qspi-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ };
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -119,34 +147,6 @@ clkmgr: clock-controller@ffd10000 {
#clock-cells = <1>;
};
- clocks {
- cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- cb_intosc_ls_clk: cb-intosc-ls-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- f2s_free_clk: f2s-free-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- osc1: osc1 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- qspi_clk: qspi-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
- };
-
gmac0: ethernet@ff800000 {
compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
reg = <0xff800000 0x2000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node
2022-06-23 2:42 [PATCH] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node niravkumar.l.rabara
@ 2022-06-23 16:16 ` Dinh Nguyen
2022-06-23 19:07 ` Dinh Nguyen
0 siblings, 1 reply; 8+ messages in thread
From: Dinh Nguyen @ 2022-06-23 16:16 UTC (permalink / raw)
To: niravkumar.l.rabara, robh+dt, krzysztof.kozlowski+dt, devicetree,
linux-kernel
On 6/22/22 21:42, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> The clocks are not part of the SoC but provided on the board
> (external oscillators). Moving them out of soc node.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> .../boot/dts/altera/socfpga_stratix10.dtsi | 56 +++++++++----------
> 1 file changed, 28 insertions(+), 28 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> index aa2bba75265f..5c7d926d18f7 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> @@ -97,6 +97,34 @@ intc: interrupt-controller@fffc1000 {
> <0x0 0xfffc6000 0x0 0x2000>;
> };
>
> + clocks {
> + cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + cb_intosc_ls_clk: cb-intosc-ls-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + f2s_free_clk: f2s-free-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + osc1: osc1 {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + qspi_clk: qspi-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <200000000>;
> + };
> + };
> +
> soc {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -119,34 +147,6 @@ clkmgr: clock-controller@ffd10000 {
> #clock-cells = <1>;
> };
>
> - clocks {
> - cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - cb_intosc_ls_clk: cb-intosc-ls-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - f2s_free_clk: f2s-free-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - osc1: osc1 {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - qspi_clk: qspi-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <200000000>;
> - };
> - };
> -
> gmac0: ethernet@ff800000 {
> compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
> reg = <0xff800000 0x2000>;
NAK! This patch breaks the Stratix10 boot. Also these clocks are part of
the SoC!
Dinh
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node
2022-06-23 16:16 ` Dinh Nguyen
@ 2022-06-23 19:07 ` Dinh Nguyen
2022-06-24 3:10 ` niravkumar.l.rabara
0 siblings, 1 reply; 8+ messages in thread
From: Dinh Nguyen @ 2022-06-23 19:07 UTC (permalink / raw)
To: niravkumar.l.rabara, robh+dt, krzysztof.kozlowski+dt, devicetree,
linux-kernel
Hi
On 6/23/22 11:16, Dinh Nguyen wrote:
>
>
> On 6/22/22 21:42, niravkumar.l.rabara@intel.com wrote:
>> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>>
>> The clocks are not part of the SoC but provided on the board
>> (external oscillators). Moving them out of soc node.
>>
>> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>> ---
>> .../boot/dts/altera/socfpga_stratix10.dtsi | 56 +++++++++----------
>> 1 file changed, 28 insertions(+), 28 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> index aa2bba75265f..5c7d926d18f7 100644
>> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> @@ -97,6 +97,34 @@ intc: interrupt-controller@fffc1000 {
>> <0x0 0xfffc6000 0x0 0x2000>;
>> };
>> + clocks {
>> + cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
>> + #clock-cells = <0>;
>> + compatible = "fixed-clock";
>> + };
>> +
>> + cb_intosc_ls_clk: cb-intosc-ls-clk {
>> + #clock-cells = <0>;
>> + compatible = "fixed-clock";
>> + };
>> +
>> + f2s_free_clk: f2s-free-clk {
>> + #clock-cells = <0>;
>> + compatible = "fixed-clock";
>> + };
>> +
>> + osc1: osc1 {
>> + #clock-cells = <0>;
>> + compatible = "fixed-clock";
>> + };
>> +
>> + qspi_clk: qspi-clk {
>> + #clock-cells = <0>;
>> + compatible = "fixed-clock";
>> + clock-frequency = <200000000>;
>> + };
>> + };
>> +
>> soc {
>> #address-cells = <1>;
>> #size-cells = <1>;
>> @@ -119,34 +147,6 @@ clkmgr: clock-controller@ffd10000 {
>> #clock-cells = <1>;
>> };
>> - clocks {
>> - cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - };
>> -
>> - cb_intosc_ls_clk: cb-intosc-ls-clk {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - };
>> -
>> - f2s_free_clk: f2s-free-clk {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - };
>> -
>> - osc1: osc1 {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - };
>> -
>> - qspi_clk: qspi-clk {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - clock-frequency = <200000000>;
>> - };
>> - };
>> -
>> gmac0: ethernet@ff800000 {
>> compatible = "altr,socfpga-stmmac-a10-s10",
>> "snps,dwmac-3.74a", "snps,dwmac";
>> reg = <0xff800000 0x2000>;
>
> NAK! This patch breaks the Stratix10 boot. Also these clocks are part of
> the SoC!
>
Take that back. Your changes are fine, but you need to update the board
files as well. i.e socfpga_stratix10_socdk.dts
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -52,12 +52,6 @@ ref_033v: regulator-v-ref {
};
soc {
- clocks {
- osc1 {
- clock-frequency = <25000000>;
- };
- };
-
eccmgr {
sdmmca-ecc@ff8c8c00 {
compatible = "altr,socfpga-s10-sdmmc-ecc",
@@ -113,6 +107,10 @@ &mmc {
bus-width = <4>;
};
+&osc1 {
+ clock-frequency = <25000000>;
+};
+
Dinh
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node
2022-06-23 19:07 ` Dinh Nguyen
@ 2022-06-24 3:10 ` niravkumar.l.rabara
2022-06-24 11:59 ` niravkumar.l.rabara
0 siblings, 1 reply; 8+ messages in thread
From: niravkumar.l.rabara @ 2022-06-24 3:10 UTC (permalink / raw)
To: dinguyen
Cc: devicetree, krzysztof.kozlowski+dt, linux-kernel,
niravkumar.l.rabara, robh+dt
>
>Take that back. Your changes are fine, but you need to update the board
>files as well. i.e socfpga_stratix10_socdk.dts
>
>
>--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
>+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
>@@ -52,12 +52,6 @@ ref_033v: regulator-v-ref {
> };
>
> soc {
> clocks {
> osc1 {
> clock-frequency = <25000000>;
> };
> };
>
> eccmgr {
> sdmmca-ecc@ff8c8c00 {
> compatible = "altr,socfpga-s10-sdmmc-ecc",
>@@ -113,6 +107,10 @@ &mmc {
> bus-width = <4>;
> };
>
>+&osc1 {
>+ clock-frequency = <25000000>;
>+};
>+
Sorry I missed this change, will update in v2 patch.
Thanks,
Nirav
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node
2022-06-24 3:10 ` niravkumar.l.rabara
@ 2022-06-24 11:59 ` niravkumar.l.rabara
2022-06-24 14:49 ` Dinh Nguyen
0 siblings, 1 reply; 8+ messages in thread
From: niravkumar.l.rabara @ 2022-06-24 11:59 UTC (permalink / raw)
To: niravkumar.l.rabara
Cc: devicetree, dinguyen, krzysztof.kozlowski+dt, linux-kernel,
robh+dt
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
The clocks are not part of the SoC but provided on the board
(external oscillators). Moving them out of soc node.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
.../boot/dts/altera/socfpga_stratix10.dtsi | 56 +++++++++----------
.../dts/altera/socfpga_stratix10_socdk.dts | 10 ++--
2 files changed, 32 insertions(+), 34 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index aa2bba75265f..5c7d926d18f7 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -97,6 +97,34 @@ intc: interrupt-controller@fffc1000 {
<0x0 0xfffc6000 0x0 0x2000>;
};
+ clocks {
+ cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ cb_intosc_ls_clk: cb-intosc-ls-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ f2s_free_clk: f2s-free-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ osc1: osc1 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ qspi_clk: qspi-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ };
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -119,34 +147,6 @@ clkmgr: clock-controller@ffd10000 {
#clock-cells = <1>;
};
- clocks {
- cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- cb_intosc_ls_clk: cb-intosc-ls-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- f2s_free_clk: f2s-free-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- osc1: osc1 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- qspi_clk: qspi-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
- };
-
gmac0: ethernet@ff800000 {
compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
reg = <0xff800000 0x2000>;
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index 5159cd5771dc..48424e459f12 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -52,12 +52,6 @@ ref_033v: regulator-v-ref {
};
soc {
- clocks {
- osc1 {
- clock-frequency = <25000000>;
- };
- };
-
eccmgr {
sdmmca-ecc@ff8c8c00 {
compatible = "altr,socfpga-s10-sdmmc-ecc",
@@ -113,6 +107,10 @@ &mmc {
bus-width = <4>;
};
+&osc1 {
+ clock-frequency = <25000000>;
+};
+
&uart0 {
status = "okay";
};
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node
2022-06-24 11:59 ` niravkumar.l.rabara
@ 2022-06-24 14:49 ` Dinh Nguyen
2022-06-24 16:21 ` [PATCHv3] " niravkumar.l.rabara
0 siblings, 1 reply; 8+ messages in thread
From: Dinh Nguyen @ 2022-06-24 14:49 UTC (permalink / raw)
To: niravkumar.l.rabara
Cc: devicetree, krzysztof.kozlowski+dt, linux-kernel, robh+dt
On 6/24/22 06:59, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> The clocks are not part of the SoC but provided on the board
> (external oscillators). Moving them out of soc node.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> .../boot/dts/altera/socfpga_stratix10.dtsi | 56 +++++++++----------
> .../dts/altera/socfpga_stratix10_socdk.dts | 10 ++--
> 2 files changed, 32 insertions(+), 34 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> index aa2bba75265f..5c7d926d18f7 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> @@ -97,6 +97,34 @@ intc: interrupt-controller@fffc1000 {
> <0x0 0xfffc6000 0x0 0x2000>;
> };
>
> + clocks {
> + cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + cb_intosc_ls_clk: cb-intosc-ls-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + f2s_free_clk: f2s-free-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + osc1: osc1 {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + qspi_clk: qspi-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <200000000>;
> + };
> + };
> +
> soc {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -119,34 +147,6 @@ clkmgr: clock-controller@ffd10000 {
> #clock-cells = <1>;
> };
>
> - clocks {
> - cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - cb_intosc_ls_clk: cb-intosc-ls-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - f2s_free_clk: f2s-free-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - osc1: osc1 {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - qspi_clk: qspi-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <200000000>;
> - };
> - };
> -
> gmac0: ethernet@ff800000 {
> compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
> reg = <0xff800000 0x2000>;
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
> index 5159cd5771dc..48424e459f12 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
> @@ -52,12 +52,6 @@ ref_033v: regulator-v-ref {
> };
>
> soc {
> - clocks {
> - osc1 {
> - clock-frequency = <25000000>;
> - };
> - };
> -
> eccmgr {
> sdmmca-ecc@ff8c8c00 {
> compatible = "altr,socfpga-s10-sdmmc-ecc",
> @@ -113,6 +107,10 @@ &mmc {
> bus-width = <4>;
> };
>
> +&osc1 {
> + clock-frequency = <25000000>;
> +};
> +
> &uart0 {
> status = "okay";
> };
What about arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts?
Also for future versions, please use a 'PATCHv#".
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCHv3] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node
2022-06-24 14:49 ` Dinh Nguyen
@ 2022-06-24 16:21 ` niravkumar.l.rabara
2022-06-24 22:47 ` Dinh Nguyen
0 siblings, 1 reply; 8+ messages in thread
From: niravkumar.l.rabara @ 2022-06-24 16:21 UTC (permalink / raw)
To: dinguyen
Cc: devicetree, krzysztof.kozlowski+dt, linux-kernel,
niravkumar.l.rabara, robh+dt
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
The clocks are not part of the SoC but provided on the board
(external oscillators). Moving them out of soc node.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
.../boot/dts/altera/socfpga_stratix10.dtsi | 56 +++++++++----------
.../dts/altera/socfpga_stratix10_socdk.dts | 10 ++--
.../altera/socfpga_stratix10_socdk_nand.dts | 10 ++--
3 files changed, 36 insertions(+), 40 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index aa2bba75265f..5c7d926d18f7 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -97,6 +97,34 @@ intc: interrupt-controller@fffc1000 {
<0x0 0xfffc6000 0x0 0x2000>;
};
+ clocks {
+ cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ cb_intosc_ls_clk: cb-intosc-ls-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ f2s_free_clk: f2s-free-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ osc1: osc1 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+
+ qspi_clk: qspi-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ };
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -119,34 +147,6 @@ clkmgr: clock-controller@ffd10000 {
#clock-cells = <1>;
};
- clocks {
- cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- cb_intosc_ls_clk: cb-intosc-ls-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- f2s_free_clk: f2s-free-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- osc1: osc1 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- };
-
- qspi_clk: qspi-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
- };
-
gmac0: ethernet@ff800000 {
compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
reg = <0xff800000 0x2000>;
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index 5159cd5771dc..48424e459f12 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -52,12 +52,6 @@ ref_033v: regulator-v-ref {
};
soc {
- clocks {
- osc1 {
- clock-frequency = <25000000>;
- };
- };
-
eccmgr {
sdmmca-ecc@ff8c8c00 {
compatible = "altr,socfpga-s10-sdmmc-ecc",
@@ -113,6 +107,10 @@ &mmc {
bus-width = <4>;
};
+&osc1 {
+ clock-frequency = <25000000>;
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
index 0ab676c639a1..847a7c01f5af 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
@@ -52,12 +52,6 @@ ref_033v: regulator-v-ref {
};
soc {
- clocks {
- osc1 {
- clock-frequency = <25000000>;
- };
- };
-
eccmgr {
sdmmca-ecc@ff8c8c00 {
compatible = "altr,socfpga-s10-sdmmc-ecc",
@@ -126,6 +120,10 @@ partition@200000 {
};
};
+&osc1 {
+ clock-frequency = <25000000>;
+};
+
&uart0 {
status = "okay";
};
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCHv3] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node
2022-06-24 16:21 ` [PATCHv3] " niravkumar.l.rabara
@ 2022-06-24 22:47 ` Dinh Nguyen
0 siblings, 0 replies; 8+ messages in thread
From: Dinh Nguyen @ 2022-06-24 22:47 UTC (permalink / raw)
To: niravkumar.l.rabara
Cc: devicetree, krzysztof.kozlowski+dt, linux-kernel, robh+dt
On 6/24/22 11:21, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> The clocks are not part of the SoC but provided on the board
> (external oscillators). Moving them out of soc node.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> .../boot/dts/altera/socfpga_stratix10.dtsi | 56 +++++++++----------
> .../dts/altera/socfpga_stratix10_socdk.dts | 10 ++--
> .../altera/socfpga_stratix10_socdk_nand.dts | 10 ++--
> 3 files changed, 36 insertions(+), 40 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> index aa2bba75265f..5c7d926d18f7 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> @@ -97,6 +97,34 @@ intc: interrupt-controller@fffc1000 {
> <0x0 0xfffc6000 0x0 0x2000>;
> };
>
> + clocks {
> + cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + cb_intosc_ls_clk: cb-intosc-ls-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + f2s_free_clk: f2s-free-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + osc1: osc1 {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + };
> +
> + qspi_clk: qspi-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <200000000>;
> + };
> + };
> +
> soc {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -119,34 +147,6 @@ clkmgr: clock-controller@ffd10000 {
> #clock-cells = <1>;
> };
>
> - clocks {
> - cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - cb_intosc_ls_clk: cb-intosc-ls-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - f2s_free_clk: f2s-free-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - osc1: osc1 {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - };
> -
> - qspi_clk: qspi-clk {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <200000000>;
> - };
> - };
> -
> gmac0: ethernet@ff800000 {
> compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
> reg = <0xff800000 0x2000>;
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
> index 5159cd5771dc..48424e459f12 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
> @@ -52,12 +52,6 @@ ref_033v: regulator-v-ref {
> };
>
> soc {
> - clocks {
> - osc1 {
> - clock-frequency = <25000000>;
> - };
> - };
> -
> eccmgr {
> sdmmca-ecc@ff8c8c00 {
> compatible = "altr,socfpga-s10-sdmmc-ecc",
> @@ -113,6 +107,10 @@ &mmc {
> bus-width = <4>;
> };
>
> +&osc1 {
> + clock-frequency = <25000000>;
> +};
> +
> &uart0 {
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
> index 0ab676c639a1..847a7c01f5af 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
> @@ -52,12 +52,6 @@ ref_033v: regulator-v-ref {
> };
>
> soc {
> - clocks {
> - osc1 {
> - clock-frequency = <25000000>;
> - };
> - };
> -
> eccmgr {
> sdmmca-ecc@ff8c8c00 {
> compatible = "altr,socfpga-s10-sdmmc-ecc",
> @@ -126,6 +120,10 @@ partition@200000 {
> };
> };
>
> +&osc1 {
> + clock-frequency = <25000000>;
> +};
> +
> &uart0 {
> status = "okay";
> };
Applied!
Thanks,
Dinh
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-06-24 22:47 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-06-23 2:42 [PATCH] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node niravkumar.l.rabara
2022-06-23 16:16 ` Dinh Nguyen
2022-06-23 19:07 ` Dinh Nguyen
2022-06-24 3:10 ` niravkumar.l.rabara
2022-06-24 11:59 ` niravkumar.l.rabara
2022-06-24 14:49 ` Dinh Nguyen
2022-06-24 16:21 ` [PATCHv3] " niravkumar.l.rabara
2022-06-24 22:47 ` Dinh Nguyen
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