From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E2444379EE4; Tue, 28 Apr 2026 09:18:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777367898; cv=none; b=Z28l1mRqe9Y91INJapGqLwD/z2xEBPk8CJ5gDO7hfXnUTVGkChKOZqxXYqUFes9m3SumFS8/+yfatLYxRA/ZtR9TcWZkPwAR6d2lXwLye0hFY/OJRNfcQUEopC5P7s/Oku75e7MUO6gNethv3vLNvePVUqvLr44Y27t56LglMh0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777367898; c=relaxed/simple; bh=wc3VVbH/dhY3d4opaXguDsV/xDKUJySVoDTQQQuvutA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=cd1Uj0fUAnBxx+JEmy9XstEisWQfIvuPsDCXaNSMxSaS/o2TX4TTj6GiTyObFo3hmnc1oLuhqMQpMhmrjF8PKstpJ9XhQ7r+noq9iBhcYz3cNzMwYk94qgAPAeJ+BQkbeeYEY+BqDL866+fYAnF/5/1XOhzkDdN75uKGFqIqqIU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hnHQhip8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hnHQhip8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 30CE6C2BCB6; Tue, 28 Apr 2026 09:18:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777367897; bh=wc3VVbH/dhY3d4opaXguDsV/xDKUJySVoDTQQQuvutA=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=hnHQhip8jp7vFRKEg0VYO0ou6c5zkhwkoIxm5Y83CaLnq+b6FF0yLFGADzo5pzpy0 oZC/ruMeCLUFNJrm3abdq8D80x0CeuXOzq2DOcM+u/eR+IpeMMrQjEd4cRz/BGv8r6 Ix58Ut9L3qnpDLewTELjao9C+8mEg50RLdWi2PA+LywpilLvq/T77LejVwPbsnLjCC geucZ6GfTGwFh+9/8/8RqzWZiGN5nVJY8xkrfUp5Wn42xgNRXyhNchsH3PxYzNcVbc +x4zmw8LUNuctUulB1895+iH5SRZ1hyitgX62HF8NB5VtfxQnGw36W7MSICsua5nva ZSepTQ3scry9w== Message-ID: <1f88a8eb-1725-4e6a-b4f3-287ec538ee7d@kernel.org> Date: Tue, 28 Apr 2026 11:18:11 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 02/12] dt-bindings: media: qcom,glymur-iris: Add glymur video codec To: Vishnu Reddy Cc: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Hans Verkuil , Stefan Schmidt , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanimir Varbanov , Joerg Roedel , Will Deacon , Robin Murphy , Bjorn Andersson , Konrad Dybcio , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, iommu@lists.linux.dev References: <20260428-glymur-v3-0-8f28930f47d3@oss.qualcomm.com> <20260428-glymur-v3-2-8f28930f47d3@oss.qualcomm.com> <20260428-nifty-quaint-hoatzin-6de65d@quoll> <97aa5f18-d1d5-f082-9075-a385255f2e97@oss.qualcomm.com> <7d775357-c7b1-4cf5-af90-012d1364e773@kernel.org> <6ebe28dc-b8a3-db92-0e66-3f0541e23e13@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 28/04/2026 11:12, Vishnu Reddy wrote: > > On 4/28/2026 1:58 PM, Krzysztof Kozlowski wrote: >> On 28/04/2026 10:08, Vishnu Reddy wrote: >>> On 4/28/2026 11:44 AM, Krzysztof Kozlowski wrote: >>>> On Tue, Apr 28, 2026 at 09:24:08AM +0530, Vishnu Reddy wrote: >>>>> Add device tree binding for the Qualcomm Glymur Iris video codec. Glymur >>>>> is a new generation of video IP that introduces a dual-core architecture. >>>>> The second core brings its own power domain, clocks, and reset lines, >>>>> requiring additional power domains and clocks in the power sequence. >>>>> >>>>> To accommodate glymur clock and power resources requirement, the maxItems >>>>> constraints in qcom,venus-common.yaml are relaxed. This allows the glymur >>>> This is a very confusing part of commit msg. You cannot relax the >>>> constraints. Each device MUST have a specific, fixed constraint. It is >>>> your task to be sure they are not relaxed. >>>> >>>> >>>>> binding to inherit from the common venus schema without duplicating shared >>>>> properties. >>>> That's obvious. Why would new iris device schema not use common venus >>>> schema? What is different here then that such possibility exists? >>> Glymur platform has a dual-core video codec architecture (vcodec0 + vcodec1), >>> requiring 9 clocks and 5 power domains. The stricter maxItems from the >>> qcom,venus-common.yaml takes precedence, making it impossible to accommodate >>> glymur requirements without updating the common schema. >> But so does every other device, no? So what is different here? > > The difference is in the resource count relative to what qcom,venus-common.yaml > permits. Existing platforms like SM8750 have 6 clocks and 4 power domains, So it is EXACTLY the same? Again, what is different between devices that it should not use common schema? > which fall within the maxItems limits defined in the common schema (clocks: 7, > power domains: 4). So for those platforms, referencing qcom,venus-common.yaml > via allOf works fine, their resource counts are within range. > > Glymur dual core architecture (vcodec0 + vcodec1) requires 9 clocks and 5 power > domains, both of which exceed the common schema maxItems. Even if > qcom,glymur-iris.yaml explicitly defines maxItems: 9 for clocks and maxItems: 5 > for power domains, the stricter limit from qcom,venus-common.yaml takes the > precedence, causing schema validation to fail. > > Glymur is the first platform where the common schema limits become a hard > blocker, unlike all prior platforms that happened to stay within those limits. Hard blocker? What? How? you are imagining some problems here which do not exist in any other devices, any other IP blocks. Why is this special and GPU is not? Or display is not? Or anything else? Why standard rules of writing bindings do not apply here? What is exactly different? Write like this: "The standard rule of from writing bindings does not apply, because .". Best regards, Krzysztof