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[82.67.6.57]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a0148b0590sm5696925e9.2.2026.09.29.11.03.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2026 11:03:29 -0700 (PDT) From: Jerome Brunet To: Junhui Liu , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Junhui Liu , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Troy Mitchell , Brian Masney Subject: Re: [PATCH v5 1/6] clk: correct clk_div_mask() return value for width == 32 In-Reply-To: <20260514-dr1v90-cru-v5-1-34f3021aab51@pigmoral.tech> References: <20260514-dr1v90-cru-v5-0-34f3021aab51@pigmoral.tech> <20260514-dr1v90-cru-v5-1-34f3021aab51@pigmoral.tech> Date: Tue, 29 Sep 2026 20:03:28 +0200 Message-ID: <1j7bk43pfz.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On jeu. 14 mai 2026 at 17:27, Junhui Liu wrote: > The macro clk_div_mask() currently wraps to zero when width is 32 due to > 1 << 32 being undefined behavior. This leads to incorrect mask generation > and prevents correct retrieval of register field values for 32-bit-wide > dividers. > > Although it is unlikely to exhaust all U32_MAX div, some clock IPs may rely > on a 32-bit val entry in their div_table to match a div, so providing a > full 32-bit mask is necessary. > > Fix this by using the standard GENMASK() macro. This safely resolves the > undefined behavior on both 32-bit and 64-bit architectures, while also > benefiting from the built-in compile-time type and bounds checking > provided by the GENMASK() macro. > > Cc: Troy Mitchell > Cc: Brian Masney > Signed-off-by: Junhui Liu > Reviewed-by: Jerome Brunet