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[82.67.6.57]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49e636f7fa2sm154001915e9.15.2026.09.12.08.50.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Sep 2026 08:51:00 -0700 (PDT) From: Jerome Brunet To: tanure@linux.com, Brian Masney Cc: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Stephen Boyd , Brian Masney , Chuan Liu , Jian Hu , Ronald Claveau , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 4/4] clk: meson: t7: don't mark sys_ampipe_nand as critical In-Reply-To: References: <20260905153234.133217-1-tanure@linux.com> <20260905153234.133217-5-tanure@linux.com> Date: Sat, 12 Sep 2026 17:50:55 +0200 Message-ID: <1jcxui79k0.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On sam. 12 sept. 2026 at 08:50, Lucas Tanure wrote: > On Sat, Sep 12, 2026 at 1:08=E2=80=AFAM Brian Masney = wrote: >> >> Hi Lucas, >> >> On Sat, Sep 05, 2026 at 04:32:34PM +0100, Lucas Tanure wrote: >> > sys_ampipe_nand clocks the pipeline stage inserted in the bus path >> > between the SD/eMMC controllers and the NIC_MATRIX fabric. It does have >> > identifiable consumers - the three MMC controllers - so marking it >> > critical was the wrong tool: the clock should be referenced from the >> > consumer nodes and claimed by the mmc driver instead. >> > >> > Drop the CLK_IS_CRITICAL flag and update the comment accordingly. >> > sys_am2axi0..2 remain critical as they clock the AXI DMA bus itself and >> > have no single identifiable consumer. >> > >> > Assisted-by: Claude:claude-fable-5 >> > Signed-off-by: Lucas Tanure >> > --- >> > This patch depends on the MMC controllers actually referencing the clo= ck: >> > the dt-bindings, mmc driver and t7 DTS changes adding the "pipeline" >> > clock must land before this patch, otherwise the boot hangs and memory >> > corruption this clock caused are reintroduced. >> >> This series should be merged together in one tree? Which tree? I can >> provide an Acked-by if it should go through the mmc tree. >> >> Brian >> > It's definitely best to keep the series together in one tree to avoid > boot regressions, > but I think the clk tree is the better fit since the core changes > revolve around clock logic. > Could you accept it ? No. This applies on top of another change already queued in the amlogic clock tree. It can't go through the MMC tree at the moment. This clock is not critical in mainline right now, so 1) I could merge this and it and in practice there would be no regression. The problem you had would still be there until the MMC change lands 2) Or you can wait for the MMC stuff to land and re-submit this in the next cycle. Your choice. IMO, (1) is fine. > > thanks > lucas --=20 Jerome