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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id 8-20020a05600c024800b003f4e8530696sm17729719wmj.46.2023.05.30.09.14.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 09:14:27 -0700 (PDT) References: <20230517133309.9874-1-ddrokosov@sberdevices.ru> User-agent: mu4e 1.8.13; emacs 28.2 From: Jerome Brunet To: Dmitry Rokosov , neil.armstrong@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, khilman@baylibre.com, martin.blumenstingl@googlemail.com Cc: jian.hu@amlogic.com, kernel@sberdevices.ru, rockosov@gmail.com, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v15 0/6] add Amlogic A1 clock controller drivers Date: Tue, 30 May 2023 18:14:01 +0200 In-reply-to: <20230517133309.9874-1-ddrokosov@sberdevices.ru> Message-ID: <1jilc94x0d.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Wed 17 May 2023 at 16:33, Dmitry Rokosov wrote: > A1 SoC has four clock controllers on the board: PLL, Peripherals, CPU, > and Audio. The audio clock controller is different from others, but the > rest are very similar from a functional and regmap point of view. > This patch series add support for Amlogic A1 PLL and Peripherals clock > drivers. > It blocks all A1 peripherals mainline support and a couple of patch series, > which were already reviewed and acked, but weren't merged due to pending > clock controller drivers series, e.g. > https://lore.kernel.org/all/20230418111612.19479-1-ddrokosov@sberdevices.ru/ > > TODO: CPU and Audio clock controllers are not included in this patch > series, it will be sent later. The following clks from these controllers > are not supported for now: > * Audio clks - vad, mclk_vad, mclk_d, resample_a, locker_in, mclk_b, > pdmdclk, pdmsysclk, eqdrc, spdifin, mclk_a, audio2_toaudiotop, > audio2_tovad, audio2_toddr_vad, audio2_tdmin_vad, audio2_pdm, > audio2_ddr_arb, audio_audiolocker, audio_eqdrc, audio_resamplea, > audio_spdifin, audio_toddrb, audio_toddra, audio_frddrb, audio_frddra, > audio_tdmoutb, audio_tdmouta, audio_loopbacka, audio_tdminlb, > audio_tdminb, audio_tdmina, audio_ddr_arb, mclk_c > > * CPU clks: cpu_fixed_source_sel0, cpu_fixed_source_div0, > cpu_fixed_source_sel1, cpu_fixed_source_div1, cpu_clk > > Validation: > * to double check all clk flags run below helper script: > pushd /sys/kernel/debug/clk > for f in *; do > if [[ -f "$f/clk_flags" ]]; then > flags="$(cat $f/clk_flags | awk '{$1=$1};1' | sed ':a;N;$!ba;s/\n/ | /g')" > echo -e "$f: $flags" > fi > done > popd > > * to trace current clks state use '/sys/kernel/debug/clk/clk_dump' node > with jq post-processing: > $ cat /sys/kernel/debug/clk/clk_dump | jq '.' > clk_dump.json > > * to debug clk rate propagation, compile kernel with the following > definition: > $ sed -i "s/undef CLOCK_ALLOW_WRITE_DEBUGFS/define CLOCK_ALLOW_WRITE_DEBUGFS/g" drivers/clk/clk.c > after that, clk_rate debug node for each clock will be available for > write operation > Applied, Thx