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AJvYcCXrN8nKU6JmamdHAFNDMNLGLmaqgLmD9yLh26sWTQB/KDg58GVqUKwqSFz+kfQQid1dq4OEJKhskpClnlCCseG2ydp7o2xAb/1ncA== X-Gm-Message-State: AOJu0YzzcR5jDB/F64NpdWkaG9nwGbZNPV6N2gR3MmIjJlJTcl0NxW5D u+rvMAUdWawVrgqh1LMTU720aTlrXGbUkMQhhkYaShkbqwu071JbHwYKLSDkD/0= X-Google-Smtp-Source: AGHT+IFN3sKGf0QLUl/rmcrF/MIEa7ILZ5sxMGe+vffDzMV1NNJqknbDpN+wCiQiguhfqPPiAmgxhg== X-Received: by 2002:a05:600c:1988:b0:418:f219:6f64 with SMTP id t8-20020a05600c198800b00418f2196f64mr2738580wmq.4.1713894221268; Tue, 23 Apr 2024 10:43:41 -0700 (PDT) Received: from localhost ([2a01:e0a:3c5:5fb1:aa38:830e:cbbf:591]) by smtp.gmail.com with ESMTPSA id d5-20020a5d6445000000b0034659d971a6sm15078195wrw.26.2024.04.23.10.43.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Apr 2024 10:43:40 -0700 (PDT) References: <20240423161006.2522351-1-gnstark@salutedevices.com> <20240423161006.2522351-3-gnstark@salutedevices.com> User-agent: mu4e 1.10.8; emacs 29.2 From: Jerome Brunet To: George Stark Cc: u.kleine-koenig@pengutronix.de, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, thierry.reding@gmail.com, hkallweit1@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@salutedevices.com, George Stark , Dmitry Rokosov Subject: Re: [PATCH 2/2] pwm: meson: support meson A1 SoC family Date: Tue, 23 Apr 2024 19:35:15 +0200 In-reply-to: <20240423161006.2522351-3-gnstark@salutedevices.com> Message-ID: <1jv848ezzo.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Tue 23 Apr 2024 at 19:10, George Stark wrote: > From: George Stark > > Add a compatible string and configuration for the meson A1 SoC family > PWM. Additionally, provide an external clock initialization helper > specifically designed for these PWM IPs. > > Signed-off-by: George Stark > Signed-off-by: Dmitry Rokosov > --- > drivers/pwm/pwm-meson.c | 35 +++++++++++++++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c > index ea96c5973488..529a541ba7b6 100644 > --- a/drivers/pwm/pwm-meson.c > +++ b/drivers/pwm/pwm-meson.c > @@ -462,6 +462,33 @@ static int meson_pwm_init_channels_meson8b_v2(struct pwm_chip *chip) > return meson_pwm_init_clocks_meson8b(chip, mux_parent_data); > } > > +static int meson_pwm_init_channels_ext_clock(struct pwm_chip *chip) That kind on naming (ext) is almost sure to clash with whatever comes next. Just use the name of the first SoC using the method, a1 for instance. > +{ > + struct device *dev = pwmchip_parent(chip); > + struct meson_pwm *meson = to_meson_pwm(chip); > + struct meson_pwm_channel *channels = meson->channels; > + struct clk_bulk_data *clks = NULL; > + unsigned int i; > + int res; > + > + res = devm_clk_bulk_get_all(dev, &clks); > + if (res < 0) { > + dev_err(dev, "can't get device clocks\n"); > + return res; > + } I don't think allocating the 'clk_bulk_data *clks' is necessary or safe. We know exactly how many clocks we expect, there is no need for a get all. > + > + if (res != MESON_NUM_PWMS) { > + dev_err(dev, "clock count must be %d, got %d\n", > + MESON_NUM_PWMS, res); > + return -EINVAL; > + } ... and this only catches the problem after the fact. It is probably convinient but not necessary. > + > + for (i = 0; i < MESON_NUM_PWMS; i++) > + channels[i].clk = clks[i].clk; channels[i].clk could be assigned directly of_clk_get() using clock indexes. No extra allocation needed. > + > + return 0; > +} > + > static const struct meson_pwm_data pwm_meson8b_data = { > .parent_names = { "xtal", NULL, "fclk_div4", "fclk_div3" }, > .channels_init = meson_pwm_init_channels_meson8b_legacy, > @@ -500,11 +527,19 @@ static const struct meson_pwm_data pwm_meson8_v2_data = { > .channels_init = meson_pwm_init_channels_meson8b_v2, > }; > > +static const struct meson_pwm_data pwm_meson_ext_clock_data = { > + .channels_init = meson_pwm_init_channels_ext_clock, > +}; > + > static const struct of_device_id meson_pwm_matches[] = { > { > .compatible = "amlogic,meson8-pwm-v2", > .data = &pwm_meson8_v2_data > }, > + { > + .compatible = "amlogic,meson-a1-pwm", > + .data = &pwm_meson_ext_clock_data > + }, > /* The following compatibles are obsolete */ > { > .compatible = "amlogic,meson8b-pwm", -- Jerome