From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jean-Christophe PLAGNIOL-VILLARD Subject: Re: [PATCH 3/3] ARM: at91/tc/clocksource: Add 32 bit variant to Timer Counter Date: Sat, 28 Jan 2012 08:01:32 +0100 Message-ID: <20120128070132.GC705@game.jcrosoft.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org To: Nicolas Ferre Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org List-Id: devicetree@vger.kernel.org On 19:05 Thu 19 Jan , Nicolas Ferre wrote: > Some SoC have a 32 bit variant of Timer Counter Blocks. We do not > need the chaining of two 16 bit counters anymore for them. > > The SoC nature is deduced from the device tree "compatible" string. > For non-device-tree configurations, backward compatibility is maintained > by using the default 16 bit counter configuration. > > This patch addresses both the atmel_tclib and its user: tcb_clksrc > clocksource. > > Signed-off-by: Nicolas Ferre Acked-by: Jean-Christophe PLAGNIOL-VILLARD Best Regards, J.